SERVICE MANUAL R5888C
QUADRAMHO Chapter 2
Page 6 of 74
The quadrilateral version of Quadramho requires additional signals of I
A
R, I
B
R and
I
C
R. These are derived from three current transformers placed in series with the
three phase transphasors, as shown in Figure 7. They have a transfer ratio of
0.544 V/A (1A relay).
All transphasor and current transformer primaries are electrically isolated to a level
of 5kV peak from their corresponding secondary and the relay case. In addition
each device is fitted with a screen which helps to couple any common mode
electrical noise, present on the relay current input terminals, to ground. This noise
is further reduced for outputs
I
A
, I
B
and I
C
by the capacitors labelled C, which
couple the noise to ground on
I
A
, I
B
and I
C
COMMON. These capacitors and
those shown in the neutral circuit, also attenuate high frequency transverse noise
present on the transphasor secondary.
Zener diodes, labelled D on the diagram, limit the circuit voltages at the module
outputs and across the angle setting potentiometers (
/θ) to non-damaging levels
when heavy surges of current are present on the transmission line.
4.4 Phase and neutral module RRZO7
Introduction
This is a two board module which contains the level detectors and the coarse reach
settings. The two versions available are a quadrilateral and a lenticular, both in 50
and 60Hz. The two nameplates are shown in Figure 11 and the switch functions in
Table 1.
4.5 Level detector board ZH0729
The left hand board contains seven level detectors and three clock divider circuits
as shown in Figure 9. A detailed description of the level detector function and
operation is given in Section 5.8.
The main clock MCK is generated in the Zone 1/2 module (See Section 4.7) and
divider circuits on this board produce MCK/7, MCK/14 and MCK/28. These
signals are used by the level detectors on this board and also those in the Zone 3
module. As part of the continuous monitoring the MCK/28 signal is monitored and
an alarm via LDALARM is given if it should fail.
The seven identical level detector elements are designed to pick up for an input
voltage of 2.933V rms. This level is set by the magnitude of the positive voltage
reference which is calibrated by ALSTOM T&D Protection & Control and the length
of the pick up time t1. As part of the continuous monitoring the negative reference
is monitored and an alarm given if it is not within the required tolerance.
Three level detectors are used as overvoltage detectors LDOVA, LDOVB and
LDOVC with a setting of 70% V
n
. The pick up timer t1 is 0.275 cycle and the drop
off time t2 is 1.1 cycles.
Three level detectors are used as low set phase current detectors with a setting of
5% of
I
n
at K1 + K2 = 4.8. This setting is obtained by amplifying the input signals
LDIA, LDIB and LDIC by gain G1. Timers t
1
and t
2
are both 0.275 cycle.
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