SERVICE MANUAL R5888C
QUADRAMHO Chapter 2
Page 15 of 74
The data from the above is multiplexed on to the port in the following way:
Each of the 4 switch banks is enabled by an output line from PPI 1 port A.
See Figure 23. This output allows the data on each switch to be read by the
microcontroller via port 1. The code switches are also enabled by an output line
from PPI 1port A. Each code switch produces the BCD equivalent of the selected
number and requires 4 input lines to be read. The code switch Y is multiplexed on
to the lower 4 bits of port 1, while code switch X is multiplexed on to the higher 4
bits of port 1. The two code switches are enabled together
The test socket is also enabled by an output from PPI 1 port A, when selected data
is transferred from the test socket inputs to port 1.
The 4 other inputs operate similarly to the above. These inputs are routed to the
higher 4 bits of port 1 when they are enabled by microcontroller port 2 bit 7.
For all of the above only 1 of these functions is enabled at any given instant.
The data from the switches and other inputs to port 1 are read during the running
of the software main loop. The enable is generated by the microcontroller.
4.9.12 Hardware reset of microcontroller and peripheral
In order to ensure correct operation of the scheme logic, the microcontroller and
peripherals must be correctly initialised after power supply rails have stabilised.
A reset pulse of duration 50ms is applied to the microcontroller and peripherals
after power up procedure. After power reset, the initialisation of software registers
begins (See Section 4.9.24).
The reset pulse is also applied if either of the following conditions occur:
a) +5V rail drops below approximately 4.5V.
b) microcontroller fails to execute the software.
4.9.13 +5V rail monitor
The microcontroller PPI and other devices operation +5V. If this rail drops in
voltage then a partial reset may occur To ensure a full reset the +5V rail is
monitored. When this drops below approximately 4.5V, a continuous reset is
applied to the microcontroller and PPI. If the voltage rises above this level then a
power up reset is performed. Thus ensuring all devices are reset completely for
interruptions in the dc supply. The loss of the +5V rail will cause the “Relay
Inoperative” alarm contacts to close.
4. 9.14 Monitoring of scheme logic software
The scheme logic software executed by the microcontroller is monitored to detect
and correct any maloperation that may occur. When the intended software loop is
being run, the code switches are always read at the beginning of the loop
regardless of the scheme selected (See Section 4.9.23).
As mentioned in Section 4.9.11, an enable output is sent to allow the
microcontroller to read the code switches. This enable is monitored by the code
switch monitor circuit which detects if the enable ceases to occur. If so, the reset
circuit is activated which resets and allows re-initialising of the PPI and the
microcontroller. Failure of the microcontroller or software will cause the “Relay
Inoperative” alarm contacts to close.
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