SERVICE MANUAL R5888C
QUADRAMHO Chapter 2
Page 21 of 74
4 9.35 BASIC subroutine
The basic scheme is not run if SOTF is enabled. The basic scheme is run for all
valid scheme options and is described in Section 5.16.23.
4.9.36 OPT subroutine
The OPT subroutine allows selection of any of the five standard tripping schemes
available via the code switches. If the basic scheme is selected then the program
bypasses the scheme options.
The carrier aided schemes (PUR, POR and BLOCK) all use a smaller subroutine
called AT (Aided Tripping). This small subroutine sets indications based on the
Zone 2 comparators. It also sets the tripping mode, depending on the CSN.
The carrier aided schemes also use another subroutine called BCIS.
This subroutine performs the following if the channel in service (CIS) opto isolator
input is not energised:
a) Allows only 3 phase tripping.
b) Blocks the auto reclose equipment if SW6 is set to right hand position.
4.9.37 MFAST subroutine
The purpose of this subroutine is to re-enable the synchronous polarising as soon
as possible after all conditions for re-start are satisfied. The synchronous polarising
is described in Section 5.2.2.
Under normal operating conditions the synchronous memory can lock on to an
input signal at 80.75°/s @ 50Hz. This would mean that for a 180° (inverted)
maximum phase difference between input and output, the locking on time would
be 2.23s. The locking rate at 60Hz is 116.28°/s.
The above means that unless further action is taken, the synchronous polarising
would be unlikely to be enabled until well after the SOTF enable time had elapsed.
However, the MFAST subroutine solves this problem and operates in the following
way. If the synchronous polarising has run out and is no longer required to run
(See Section 5.2.2) then a timer of length 140ms is run to allow several cycles of
synchronous polarising input to be established. When the timer runs out, the
synchronous polarising enable flag is reset and the timer interrupt (described later)
is delayed by approximately 80µs, so that synchronous polarising registers can be
pre-set.
The synchronous polarising output is delayed by 4 interrupt cycles (4 x 179µs)
from the input waveform, so that when an interrupt occurs the output can follow
any changes of state that occur in the input. If this is not done the output may get
out of phase with the input and would only phase lock at the normal synchronous
polarising run lock-on rate.
4.9.3S PSMIS subroutine
The PSMIS subroutine runs several functions, the main feature being the power
swing blocking (PSB) scheme. PSB is described in Section 5.13.
The functions performed by the PSMIS subroutine are:
a) runs power swing blocking scheme (PSB).
b) resets VTS blocking and indication latches and power swing indicator latch if
the push button is operated.
c) performs trip latching logic and runs trip drop off timer.
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