May 2013 Altera Corporation Cyclone V SoC Development Kit
User Guide
5. Board Update Portal
The Cyclone V SoC Development Kit ships with the Golden System Reference Design
(GSRD) programmed into flash. This design consists of both a hardware and software
portion. The hardware portion that is programmed into the FPGA is called the Golden
Hardware Reference Design (GHRD) and is programmed into flash device U8. The
software portion is programmed into SD card flash memory and consists of the Linux
kernel, preloader, and u-boot images.
When the development kit board is powered up in the factory default state, the GSRD
boots up as well as the web server application.
Connecting to the Board Update Portal Web Page
This section provides instructions to connect to the Board Update Portal web page.
1 Before you proceed, ensure that you have the following:
■ A PC with a connection to a working Ethernet port on a DHCP enabled network.
■ A separate working Ethernet port connected to the same network for the board.
■ The Ethernet and power cables that are included in the kit.
To connect to the Board Update Portal web page, perform these steps:
1. Ensure that the CSEL and BSEL jumpers (Table 4–4 on page 4–5) and the DIP
switch SW2.3 (Table 4–1 on page 4–3) are in the factory default positions.
2. Attach the Ethernet cable from the board to your LAN.
3. Power up the board. The board connects to the LAN’s gateway router and obtains
an IP address. The LCD on the board displays the IP address.
4. Launch a web browser on a PC that is connected to the same network, and enter
the IP address from the LCD into the browser address bar. The Board Update
Portal web page appears in the browser.
1 You can click Cyclone V SoC Development Kit on the Board Update Portal
web page to access the kit’s home page for documentation updates and
additional new designs.
f You can also navigate directly to the Cyclone V SoC Development Kit page of the
Altera website to determine if you have the latest kit software.
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