UG-1828 Preliminary Technical Data
Rev. PrC | Page 266 of 338
Schematic Net Name FMC Connector Mappings
SPI_DO G16-FMC_LA12_N
MODE D17-FMC_LA13_P
RESET_TRX D18-FMC_LA13_N
DEV_MCS_FPGA_IN+ C18-FMC_LA14_P
DEV_MCS_FPGA_IN- C19-FMC_LA14_N
DGPIO_0 G18-FMC_LA16_P
DGPIO_1 G19-FMC_LA16_N
DGPIO_3 H17-FMC_LA11_N
DGPIO_4 D15-FMC_LA09_N
DGPIO_5 C15-FMC_LA10_N
DGPIO_6 C26-FMC_LA27_P
DGPIO_7 D26-FMC_LA26_P
DGPIO_8 H31-FMC_LA28_P
DGPIO_9 H32-FMC_LA28_N
DGPIO_10 H16-FMC_LA11_P
DGPIO_11 C27-FMC_LA27_N
GP_INT H34-FMC_LA30_P
VADJ_TEST_2 (PLATFORM_STATUS) G34-FMC_LA31_N
FPGA_MCS_IN+ H37-FMC_LA32_P
FPGA_MCS_IN- H38-FMC_LA32_N
ISOLATION TECHNIQUES USED ON THE ADRV9001 EVALUATION CARD
Given the density of sensitive and critical signals, significant isolation challenges are faced when designing a PCB for the ADRV9001.
Isolation requirements listed below were followed to accurately evaluate the ADRV9001 device performance. Analytically determining
aggressor-to-victim isolation in a system is very complex and involves considering vector combinations of aggressor signals and coupling
mechanisms.
Isolation Goals
Table 107 lists the isolation targets for each RF channel-to-channel combination type. To meet these goals with significant margin,
isolation structures were designed into the ADRV9001 evaluation board.
Table 107. Port to Port Isolation Goals
30 MHz to 1 GHz 1 GHz to 6 GHz
Tx1 to Tx2 75 dB 70 dB
Tx1 to Rx1A/Rx1B 75 dB 70 dB
Tx1 to Rx2A/Rx2B 75 dB 70 dB
Rx1A/Rx1B to Rx2A/Rx2B 70 dB 65 dB
Rx1A to Rx1B 70 dB 65 dB
Isolation Between RF IO Ports
These are the primary coupling mechanisms between RF IO paths on the evaluation board:
• Magnetic field coupling
• Surface propagation
• Cross domain coupling via ground
To reduce the impact of these coupling mechanisms on the ADRV9001 customer evaluation board, several strategies were used. Large
slots are opened in the ground plane between RF IO paths. These discontinuities prevent surface propagation. These structures consist of
a combination of slots and square apertures. Both structures are present on every copper layer of the PCB stack. The advantage of using
square apertures is that signals can be routed between the openings without disturbing the isolation benefits that the array of apertures
provides. A careful designer will notice various bends in the routing of differential paths. These routes were developed and tuned through
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