UG-1828 Preliminary Technical Data
Rev. PrC | Page 320 of 338
In Figure 304 a sample JSON file with DMR settings has been loaded. The parameters appear in the table for the Rx enable (Rx1 Pin) and
DMA signals. In this example the frame length is 12000000 clock cycles (60ms). Both signals primary assert happens at the beginning of
the frame and then drops on the 6000000 clock cycle (30ms). The frame then repeats itself as the Repeat one frame forever has been
selected.
Enabling Tx1 DMA sends data from FPGA to SSI interface. Disabling Tx1 DMA stops sending data from FPGA to SSI interface. It works
together with Tx_interface enabling/disabling (accepting data from SSI at ADRV9001) so it provides more flexibility for user to control
what data to transmit. For example, the user can have 4 different scenarios:
• DMA disabled, Tx_interface disabled: nothing is transmitted
• DMA disabled, Tx_interface enabled: 0s are transmitted
• DMA enabled, Tx_interface disabled: Data in DMA is not transmitted and is lost
• DMA enabled, Tx_interface enabled: Data in DMA is transmitted
The Tx1 DMA trigger is defined by the following enum:
typedef enum adi_fpga9001_DmaTrigger
{
ADI_FPGA9001_DMA_TRIGGER_SMA_1 = 0,
ADI_FPGA9001_DMA_TRIGGER_SMA_2 = 1,
ADI_FPGA9001_DMA_TRIGGER_MCS = 2,
ADI_FPGA9001_DMA_TRIGGER_GPIO = 3,
ADI_FPGA9001_DMA_TRIGGER_TDD_ENABLE = 4,
ADI_FPGA9001_DMA_TRIGGER_IMMEDIATE = 5
} adi_fpga9001_DmaTrigger_e;
• If using ADI_FPGA9001_DMA_TRIGGER_IMMEDIATE then the DMA will transfer data whenever the DMA_Enable goes
high (and has valid data from the SSI).
• If using ADI_FPGA9001_DMA_TRIGGER_TDD_ENABLE then the adi_fpga9001_TddConfig_t-
>ADI_FPGA9001_TDDSELECT_RX1_DMA_TRIG signal will be the trigger. When this signal goes high (programmed in the
TDD config) then the DMA is triggered and will transfer data whenever the DMA_Enable goes high (and has valid data from
the SSI)
• If using ADI_FPGA9001_DMA_TRIGGER_GPIO/MCS/SMA_1/2 then the GPIO/MCS/SMA signal will be the trigger. When
this signal goes high the DMA is triggered and will transfer data whenever the DMA_Enable goes high (and has valid data from
the SSI)
ADI_FPGA9001_DMA_TRIGGER_IMMEDIATE is used in the current release.
Tracking Calibrations
Tracking calibration algorithms can be enabled/disabled in the tracking cals tab. Certain algorithms can only be enabled in certain
profiles. For example RX harmonic distortion can only be enabled if it is configured in DMR, Analog FM, and Tetra profiles. It grays out
and is disabled in LTE and custom profiles.
The user can enable and disable an individual tracking algorithm to observe its effect while transmitting and receiving a signal.
To Next Page
Loading...
Need help?
General
