AT90S4414/8515
31
The Stop condition provides a Timer Enable/Disable function. The CK down divided modes are scaled directly from the CK
oscillator clock. If the external pin modes are used for Timer/Counter0, transitions on PB0/(T0) will clock the counter even if
the pin is configured as an output. This feature can give the user SW control of the counting.
Timer Counter 0 - TCNT0
The Timer/Counter0 is realized as an up-counter with read and write access. If the Timer/Counter0 is written and a clock
source is present, the Timer/Counter0 continues counting in the clock cycle following the write operation.
16-bit Timer/Counter1
Figure 30 shows the block diagram for Timer/Counter1.
Figure 30. Timer/Counter1 Block Diagram
Bit 76543210
$32 ($52) MSB LSB TCNT0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
T1
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