Bosch Sensortec"| BST-BMP581-DS004-02 40 | 74
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without notice Document number: BST-BMP581-DS004-02
5.6.2 I²C read operation
I²C read operation supports single-byte as well as multi-byte (burst) reading. A read command consists of a 1 byte I²C
write phase followed by an I²C read phase. The two I²C transmissions must be separated by a repeated start condition
(Sr) as shown in Figure 15 or a stop followed by start condition (P followed by S) as shown in Figure 16. The I²C write
phase addresses the slave and sends the register address to be read. After the slave acknowledges the transmission,
the host is expected to generate a start condition and then to send the slave address together with a read bit (R/W =
1'b1). Then the host releases the bus and waits for the data bytes to be read out from slave. After each data byte the
host has to generate an acknowledge bit (ACK = 1'b0) to enable further data transfer. A NACK (ACK = 1'b1) from the
host stops the data transferring from slave. Slave releases the bus so that the host can generate a STOP condition
and terminate the transmission. During a mutli-byte read transfer, the register address is automatically incremented
such that more than one byte can be sequentially read out. Once a new data read transmission starts, the start
address is set to the register address specified in the latest I²C write command (see Figure 17). By default the start
address is set at 8h'00.
In this way repetitive multi-byte reads from the same starting address are possible.
Figure 15: I²C multi-byte read protocol with repeated start
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