Bosch BMP581 - Page 51

Bosch Sensortec"| BST-BMP581-DS004-02 51 | 74
Modifications reserved | Data subject to change
without notice Document number: BST-BMP581-DS004-02
7.1 Register (0x01) ASIC identification ID
Bit
7
6
5
4
3
2
1
0
Read/Write
R
R
R
R
R
R
R
R
Reset Value
0
1
0
1
0
0
0
0
Content
chip_id
chip_id:(bit offset: 0) ASIC ID
7.2 Register (0x02) ASIC revision ID
Bit
7
6
5
4
3
2
1
0
Read/Write
R
R
R
R
R
R
R
R
Reset Value
0
0
1
1
0
0
1
0
Content
asic_rev_id
asic_rev_id:(bit offset: 0) ASIC revision
7.3 Register (0x11) ASIC status register
Bit
7
6
5
4
3
2
1
0
Read/Write
R
R
R
R
R
R
R
R
Reset Value
0
0
0
0
0
0
0
0
Content
reserved_7_4
i3c_err_3
i3c_err_0
hif_mode
hif_mode:(bit offset: 0) HIF mode (NVM-backed)
Value
Description
0b00 (0x0)
I2C Mode Only [SPI disabled]
0b01 (0x1)
SPI Mode1 and Mode2
0b10 (0x2)
SPI Mode0 and Mode3
0b11 (0x3)
SPI and I2C Available (Autoconfig) Interface selection is automatically configured. Default is
I2C mode. During Power-on CSB pin should be tied to VDDIO to pull it high at power-on. If
CSB goes low during, I2C interface will be disabled until the next power-on-reset.
i3c_err_0:(bit offset: 2) SDR parity error occurred
i3c_err_3:(bit offset: 3) S0/S1 error occurred. When S0/S1 error occurs, the slave will recover automatically after 60us
as if an HDR-exit pattern is executed on the bus. Flag will persist for notification purpose. This flag is clear-onread
type. It is cleared automatically once read.
reserved_7_4:(bit offset: 4) reserved