Clevo P170SM User Manual

Schematic Diagrams
B - 46 TPM
B.Schematic Diagrams
TPM
Sheet 45 of 60
TPM
12/06 DVT¤£¤W¥ó Gary
SLB9635
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D02_1112_Alex
SLB9635TT & SLB9655TT Co-Layout
PLT_R ST#
PCLK_TPM
LPC_AD3
LPC_AD1
TPM_BA DD
LPC_AD2
TPM_PP
LPC_FRAME#
PM_CLKRUN#
LPC_AD0
R315 *0_04
C181
*0.1u_16V_Y5V_04
C171
*0.1u_16V_Y 5V_04
R324 *0_04
TPM
U13
*SLB9655TT
LAD3
17
LAD0
26
LAD1
23
LAD2
20
VDD1
10
XTA LI
13
VDD3
24
VDD2
19
LFRAME#
22
LCLK
21
LRESET#
16
SERIRQ
27
CLKRUN#
15
GND_1
4
GND_2
11
GND_3
18
GND_4
25
GPIO
6
GPIO2
2
XTA L O
14
TESTI
8
TESTBI/BADD
9
PP
7
NC_1
1
NC_2
3
NC_3
12
LPCPD#
28
VSB
5
R188 *10K_04
C213
*1u_6.3V_X5R_04
C205
*0.1u_16V_Y 5V_04
R325 *0_04
R157 *10K_04
R156 *10K_04
R158 *10K_04
C186
*0.1u_16V_Y5V_04
R322 *0_04
R296 *0_04
R187 *33_04 C217 *10p_50V_04
VDD3
3.3VS
LPC_AD320,30,34
3.3VS
3.3VS
LPC_AD220,30,34
LPC_AD120,30,34
PL T_RST#3,13,22
LPC_AD020,30,34
SUS_STAT#21
LPC_FRAME#20,30,34
PCLK_TPM27
PM_CLKRUN#21
SERIRQ20,30,34
TPM_BADD
Asserted before entering S3
LPC reset timing:
HI: 4E/ 4F H
LOW: 2E/ 2F H
HI: ACCESS
LOW: NORMAL ( Internal PD )
TPM_PP
LPCPD# inactive to LRST# inactive 32~96us
TPM_BADDPLT_R ST#
SLB9655
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SLB9655
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SLB9655
¤£¤W¥ó
SLB9655
¤£¤W¥ó
SLB9655
¤£¤W¥ó
PCLK_TPM
TPM_ PP
TPM_ BAD D
SLB9635,SLB9655
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Gary 10/17(Fix X'tal¤£¤W¥óby ¦@¥Î½u¸ô)
R107
*0_04
12/06 DVT¤£¤W¥ó Gary
12/06 DVT¤£¤W¥ó Gary
12/06 DVT¤£¤W¥ó Gary
R108 *0_04
VDD313,19,20,21,23,24,25,26,27,29,34,36,37,40,41,42,45
3.3VS3,5,9,10,11,12,13,14,16,17,18,19,20,21,22,24,25,26,27,28,29,30,32,33,34,35,36,37,41,44,61,62
12/06 DVT¤£¤W¥ó Gary
D02A DEL X2,C187,C185,R317,R318
12/06 DVT¤£¤W¥ó Gary
12/06 DVT¤£¤W¥ó Gary

Clevo P170SM Specifications

General

Brand	Clevo
Model	P170SM
Category	Laptop
Language	English