CapSense Express Controllers Registers TRM, Document No. 001-91082 Rev. *E 80
PWM_DUTYCYCLE_CFG0
0x41
1.5.49 PWM_DUTYCYCLE_CFG0
Address = 0x41
GPO0 PWM duty cycle configuration. This register is not applicable for part CY8CMBR3106S.
Address: 0x41
Bits 76543210
Host Access RW RW
Device Access RW RW
Bit Name LOW_DUTY_CYCLE HIGH_DUTY_CYCLE
Bits Name Description
7 : 4 LOW_DUTY_CYCLE PWM duty cycle to be driven on GPO0 when this GPO is in logic low state. This bitfield allows
16 settings for 0% to 100% duty cycle in steps of 6.67%. The valid value of this bit field ranges
from 0 to 15. This bit field is not applicable for part CY8CMBR3106S.
3 : 0 HIGH_DUTY_CYCLE PWM duty cycle to be driven on GPO0 when GPO is in logic high state. This bitfield allows 16
settings for 0% to 100% duty cycle in steps of 6.67%. The valid value of this bit field ranges from
0 to 15. This bit field is not applicable for part CY8CMBR3106S.