Denon AVR-X4100W

R5F5210ABDFP (DIGITAL : IC171)
R5F5210ABDFP Terminal Functions
Pin Symbol Pin Name I/O Pu/Pd LvCnv STBY
CEC
STBY
Function
1 VREFH VREFH
- - - - -
+3.3V
2 P03/DA0 NET/HDMI
O C - Z L
VPLD control pin (H:NET/WiFi/USB/BT,L:HDMI)
3 VREFL VREFL
- - - - -
GND
4 PJ3 778_3/778_2
O C - Z -
Audio data Bus control pin (HDMI input)
(H:MN8647781_3,L:MN8647781_2)
5 VCL VCL
I - - - -
Smoothing capacitor connection pin
6 PJ1 TX/RX
O C - Z -
NC
7 MD MD
I -
SCPU
3VPu
- -
Single-chip/Micro-processor mode switching (Normal
single-chip : L, Rewrite boot program start : H input
set)
8 XCIN XCIN
I - - - -
NC
9 XCOUT XCOUT
O - - - -
NC
10 RES# SUB_RESET
I -
SCPU
3VPu
Z -
Reset input
11 XTAL/P37 XTAL
O - - - -
Oscillator connection
12 VSS VSS
- - - - -
GND
13 EXTAL/P36 EXTAL
I - - - -
Oscillator connection
14 VCC VCC
- - - - -
+3.3V
15 P35/NMI(input) NMI
I -
SCPU
3VPu
- -
NC
16 P34/SCK6/IRQ4 CEC_OUT
O C - Z -
CEC-D signal output pin
17 P33/RXD6/SSCL6/IRQ3-DS 778_2_HAINT
I - - Z -
HDMI MN8647781(RX) Audio INT input pin
18
P32/TXD6/SSDA6/IRQ2-
DS
CEC_IN
I -
SCPU
3VPu
Z -
CEC-D signal input pin
19 P31/IRQ1-DS ACKSIMO
I - - Z -
MAIN-SUB ucom communication control pin
20 P30/RXD1/SSCL1/IRQ0DS SCPURXD
I - Pd Z -
Data reception input from the external
21 P27/SCK1 DIRCE
O C - Z L
DIR control pin(PCM9211)
22 P26/TXD1/SSDA1 SCPUTXD
O C
SCPU
3VPu
Z -
Data transmission output to external
23 P25 DIRDOUT
I -
DA
3.3Pu
Z -
DIR control pin(PCM9211)
24 P24 DIRCLK
O C - Z L
DIR control pin(PCM9211)
25 P23 REQSOMI
O C - Z -
MAIN-SUB ucom communication control pin
26 P22/SCK0 CLKSIMO
I - - Z -
MAIN-SUB ucom communication control pin
27 P21/RXD0/SSCL0 SIMO
I - - Z -
MAIN-SUB ucom communication control pin
28 P20/TXD0/SSDA0 SOMI
O C - Z -
MAIN-SUB ucom communication control pin
29 P17/SCK1/IRQ7 DIRRST
O C - O/L L
DIR control pin(PCM9211)
30 P16/TXD1/SSDA1/IRQ6 DIRDIN
O C - Z L
DIR control pin(PCM9211)
31 P15/RXD1/SSCL1/IRQ5 SUB_BDOWN
I - - Z -
Power failure detect(Power failure:L)
32 P14/IRQ4 NC
O C - Z -
NC
33 P13/SDA/IRQ3 NC
O C - Z -
NC
34 P12/SCL/IRQ2 778_1_RST
O C Pd Z ※
HDMI MN8647781(TX) RESET control pin
R01DS0041EJ0150 Rev.1.50 Page 21 of 221
Oct 18, 2013
RX210 Group 1. Overview
Figure 1.6 Pin Assignments of the 100-Pin LQFP
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
PE0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
P47
P46
P45
P43
P42
P41
VREFL0
P40
VREFH0
AVCC0
P07
AVSS0
PE1
P44
PC2
PC4
PC5
PC6
PC7
P50
P51
P52
P53
P54
P55
PH0
PH1
PH3
P12
P13
P14
P15
P16
P17
P20
P21
P22
PC3
PH2
PE2
P05
RX210 Group
PLQP0100KB-A
(100-pin LQFP)
(Top view)
Note: • This figure indicates the power supply pins and I/O port pins. For the pin configuration, see the
table “List of Pins and Pin Functions (100-Pin LQFP)”.
180