Troubleshooting 6-43
locked, and the VCO will go to one of the extremes. The typi
-
cal range of the VCO is 95 to 105 MHz, thus giving an error of
typically 5 % in the measuring results.
Check the loop voltage (DC) at R272. It should be 1.6 - 2.2 V.
Check the 100 MHz signal at U48:4. It should be locked to the
incoming 10 MHz at U9:8. Check the lock condition with a
2-channel oscilloscope. Trigger on the 10 MHz channel. Then
the signal on the other channel shall be fixed, i.e. not moving
along the time axis. Check the PLL LOCK signal at U9:14
(lock is high).
Prescaler
The optional prescalers are not to be repaired. The faulty unit
should be sent to the factory, and an exchange unit will be
returned.
The best way to isolate the fault is to use another, functioning,
timer/counter with the same prescaler. Interchange the
prescalers and see if the problem follows the prescaler or the
timer/c ounter.
First measure with Channels A and B and check that the result
is OK. Select the function Frequency C. Connect a signal ac-
cording to Table 6-2 to Input C. Check the following pins on
the prescaler connector J15 on the main circuit board.
Pin 1 +5 V supply
Pin 5 +12 V supply
Pin 7 ON/OFF, ON is 0 V
Pin 11 test signal, should be 0 V
Pin 12 code 0, see Table 6-2
Pin 14 code 1, see Table 6-2
Pin 16 code 2, see Table 6-2
Pin 4 prescaler output signal, PECL levels (+4.1 V and
+3.4 V)
Measure with oscilloscope and probe at pin 4. The output fre
-
quency should be the input frequency divided by the factor in
the table. Check with a frequency counter.
Note: The 2.7 GHz option has a sensitivity trimmer. See
page 7-14 for information on how to adjust it.
Microprocessor & Memories
Startup Process
The processor in this instrument is a Sharp LH79524 with a
32-bit ARM720T core. It is housed in an IC (U13) together
with peripheral units like SRAM, timers, I
2
C bus interface,
SPI bus interface and LCD controller .
The 32-bit microprocessor bus is connected to one 16-bit
Flash PROM (U17) and two 16-bit SDRAMs (U15 & U16).
The two SDRAMs are organized as one 32-bit wide memory.
The microprocessor bus is also, via bidirectional buffers, con
-
nected to an FPGA, a USB IC and a GPIB IC.
A reset IC (U116) monitors +3.3 VD and +1.8 V. The reset
signal is active low and is kept low for approximatel y 160 to
180 ms after the voltages have settled and been approv ed .
Measure at X33. The ramp-up time for +3.3 VD is approxi
-
mately 3 ms.
The processor has an internal linear regulator that generates
the core voltage (+1.8 V) from the +3.3 VD I/O voltage.
Check +1.8 V at X66.
The rising edge of the reset signal marks the start of the boot
sequence. All I/Os on the processor are set to inputs. The
11 .2896 MHz oscillator will start running (check at R358).
An internal PLL generates 1.88 MHz (reset value) as micro-
processor clock (check at X29). The processor will start read-
ing in the Flash PROM. The initializing of the processor and
the peripherals will start.
The I/Os will b e set up, the p rocesso r clock will be set to
50.8 MHz (check at X29). The SDRAMs will start, and the
code is copied from the Flash PROM to the SDRAMs. From
now on the code is executed from the SDRAMs. Then all the
other subsystem s are initialized: I
2
C bus, LCD controller, SPI
bus, fan etc. The FPGA is also programm e d by the processor.
The progress of the initialization can be followed at two test
points, X55 and X31.
Test Point Reset I/O
Setup
SDRAM
Execute
I
2
C Init Init Ready
X55 float. inp. 1 0 1 0
X31 float. inp. 1 1 0 0
See Figures 6-74 to 6-76 for a survey of a typical instrument
startup.
The LCD is switched on. The LCD controller in the processor
generates the control signals for the LCD. See Figures 6-77 to
6-81and 6-83. Note the different timing for the signals. The
I
2
C bus is used for switching the LCD on. The ON signal can
be checked at R34 on the display board. It should be high. The
LCD voltages must also be swit c hed on. It is done by a control
signal from the processor. Check the signal at R33 on the dis
-
play board. It should be high. Negative pulses on this signal
are used for adjusting the contrast of the LCD, i.e. the LCD
PRESCALER 2.7 GHz
Frequency (GHz) 1
Level (dBm) 0
Division Factor 16
Code 0 0
Code 1 1
Code 2 0
Table 6-4 Prescaler characteristics.
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