Timebase Reference
Circuits
The measurement reference is either a 10 MHz signal from an
internal oven-controlled crystal oscillator on the main circuit
board or a signal from the external reference input that accepts
the following frequencies: 1, 5 and 10 MHz. A frequency mul
-
tiplier transforms the external signal to 10 MHz. The selected
10 MHz reference is always available at the internal reference
output. See Figure 6-67.
The main PCB is prepared for both types of internal timebase,
but only one of them is mounted. The selection is made at the
factory. You have to run the utility program if the oscillator is
to be changed. Closed Case Calibration is used to adjust the
oscillator. On power-up the processor outputs the setting that
is stored as the correct one for 10.000000 MHz. It will take
some time for the oven o scillator to reach the correct fre
-
quency. A calibration must be performed if the adjusting volt
-
age should move during operation, not only on power-up.
The selection between the on board oscillator and the external
reference is made in the FPGA. The 10 MHz signal from the
other source is switched off.
Connect a 10 MHz signal to the external reference input. Use
the
SETTINGS menu to alternate between internal and exter
-
nal oscillator. Check for correct signals at U4:6 for the stan
-
dard oscillator, at U4:8 for the oven oscillator and at U33:3 for
the external reference. Check also that the selected timebase
reference is present at the internal reference output BNC con-
nector on the rear panel.
Oven Oscillator
See Figure 6-68 and Figure 6-69.
The oven oscillator is a self-contained un it, enclosed in a
metal box and soldered to the mai n circuit board. It cannot be
repaired and must be replaced with a new oscillator if it is
faulty.
Let the oven oscillator warm up 10 minutes b efo re starting
measurements. The 12 V supply voltage can be checked at
X17. The oven oscillator should be powered also in standby
mode.
The o ven oscillator outputs a 10 MHz signal if powered. It
should be 1.3 V
pp
measured at R282. If not selected, a gate
(U4) stops the signal, the control signal (U4:9) is then low.
The frequency is controlled by a DAC (U5). Its reference
voltage is derived from the oscillator, app r o x imately +5 V
(C174). The polarity of the reference voltage is reversed in an
op am p (U6), and the voltage at U5:1 should be -5 V. The out
-
put voltage from the DAC should be between 0 and V
ref
,mea
-
sured at R281. The DAC is controlled by the processor via the
SPI bus.
The frequency adjustment range should be wide enough to al
-
low for more than 10 years of oscillator aging. The oscillator
6-40 Troubleshooting
Figure 6-66 Oscillogram showing the signal at X7, Period Single B.
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