FUNAI LF320EM5F - Digital Main 6 Schematic Diagram [TYPE G]

10-35
TU-SCL59
48 IF-AGC
OPEN
C3906
0.1
C3910
0.1
C3174
OPEN
C3145
0.1
C3173
0.1
C3142
OPEN
C3144
L3108
OPEN
4.7K
R3937
33P
C3909
10K
R3180
D3903
MM5Z5V6B
D3902
MM5Z5V6B
50
IC3101(5/5)
MSD8220LB1-S1
*1
TU-SDA58
D3904
MM5Z5V6B
10
C3905
L3913
2.2uH
100
R3936
0.1
C3143
47
R3206
51
R3187
4.7K
R3938
33
R3151
47
R3207
33
R3152
51
R3181
0.022
C3168
OPEN
C3150
1
C3149
33P
C3908
L3104
22uH
49
D3901
MM5Z5V6B
P-ON+3.3V
100
R9001
OPEN
C3904
OPEN
C3907
3 DIF(+)
CN9001
1 +3.3V
4 DIF(-)
2 GND
3 SDA
CN9002
1 IF-AGC
4 GND
2 SCL
123456
7
8
9
10
11
12
1314151618 17
19
20
21
22
23
24
DSP
/FILTER
PGA ADC
RF
AGC
OUTPUT
I/F
IC9001
SI2151
NU SDA SCL IF-AGC NU GND
VDDL
GND
VCC
NU
XTAL-I XTAL-O
VCC GND VCC
NU
RF-REF
RF-IP
GND
GND
NU
100
R9002
1P
C9022
1000P
C9008
1
C9009
1P
C9021
1000P
C9010
100
R9005
100
R9004
1P
C9019
1P
C9020
X9001
24MHz
1
3
4
2
33P
C3927
33P
C3926
82P
C9018
C9014
VARISTOR
JK9301
150P
C9004
330P
C9001
L9001
0.27uH
120P
C9002
L9002
0.22uH
180P
C9003
3P
C9015
L9007
5.6uH
3P
C9017
L9004
0.27uH
L9003
0.27uH
1000P
C9006
150P
C9005
L9006
0.27uH
L9005
0.27uH
1K
R9003
0.1
C9007
1000P
C9011
1000P
C9012
0.1
C9013
1
C9016
DIGITAL SIGNAL PROCESS
/MAIN MICRO CONTROLLER
DEMODULATOR
/MPEG
DECODER
TO DIGITAL
MAIN 3
IC3101(2/5)
TO DIGITAL
MAIN 3
IC3101(2/5)
2
4
3
1
AF AJAHAG AI AK
DIGITAL MAIN CBA UNIT
CONTINUE
DIGITAL 5
(NO CONNECTION)
(NO CONNECTION)
ANT-IN
(Si TUNER)
Digital Main 6 Schematic Diagram [TYPE G]
FL14.10GSCD6
The order of pins shown in this diagram is different from that of actual IC3101.
IC3101 is divided into five and shown as IC3101 (1/5) ~ IC3101 (5/5) in this Digital Main Schematic Diagram Section.
1 NOTE: