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Intel 8XC251SA
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8XC251SA, SB, SP, SQ USER’S MANUAL
A-24
Table A-27. Summary of Control Instructions
Mnemonic <dest>,<src> Notes
Binary Mode Source Mode
Bytes States (2) Bytes States (2)
ACALL
addr11 Absolute subroutine call 2 9 2 9
ECALL
@DRk Extended subroutine call, indirect 3 12 2 11
addr24 Extended subroutine call 5 14 4 13
LCALL
@WRj Long subroutine call, indirect 3 9 2 8
addr16 Long subroutine call 3 9 3 9
RET
Return from subroutine 1 6 1 6
ERET
Extended subroutine return 3 10 2 9
RETI
Return from interrupt 1 6 1 6
AJMP
addr11 Absolute jump 2 3 2 3
EJMP
addr24 Extended jump 5 6 4 5
@DRk Extended jump, indirect 3 7 2 6
LJMP
@WRj Long jump, indirect 3 6 2 5
addr16 Long jump 3 4 3 4
SJMP
rel Short jump (relative addr) 2 3 2 3
JMP
@A+DPTR Jump indir relative to the DPTR 1 5 1 5
JC
rel Jump if carry is set 2 1/4 2 1/4
JNC
rel Jump if carry not set 2 1/4 2 1/4
JB
bit51,rel Jump if dir bit is set 3 2/5 3 2/5
bit,rel Jump if dir bit of 8-bit addr location
is set
5 4/7 4 3/6
JNB
bit51,rel Jump if dir bit is not set 3 2/5 3 2/5
bit,rel Jump if dir bit of 8-bit addr location
is not set
5 4/7 4 3/6
JBC
bit51,rel Jump if dir bit is set & clear bit 3 4/7 3 4/7
bit,rel Jump if dir bit of 8-bit addr location
is set and clear bit
5 7/10 4 6/9
JZ
rel Jump if acc is zero 2 2/5 2 2/5
JNZ
rel Jump if acc is not zero 2 2/5 2 2/5
JE rel Jump if equal 3 2/5 2 1/4
JNE rel Jump if not equal 3 2/5 2 1/4
JG rel Jump if greater than 3 2/5 2 1/4
JLE rel Jump if less than or equal 3 2/5 2 1/4
JSL rel Jump if less than (signed) 3 2/5 2 1/4
NOTES:
1. A shaded cell denotes an instruction in the MCS
®
51 architecture.
2. For conditional jumps, times are given as not-taken/taken.

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