Intel 8XC251SA - Page 450

8XC251SA, SB, SP, SQ USER’S MANUAL
Index-2
CJNE instruction, A-25
Clock, 2-6
external, 11-4, 11-5
external source, 11-3
idle and powerdown modes, 12-5
idle mode, 12-4
powerdown mode, 12-5, 12-6
sources, 11-3
CLR instruction, 5-9, 5-11, A-17, A-23
CMOD, 3-17, 3-19, 9-13, C-2, C-5, C-11
interrupts, 6-5
CMP instruction, 5-8, 5-14, A-15
Code constants, 4-16
Code fetches
external, 13-1, 13-5
internal, 13-5
page hit and page miss, 13-6
page mode, 13-6
Code memory
MCS 51 architecture, 3-3
See also On-chip code memory, External code
memory
Compatibility (MCS 251 and MCS 51
architectures), 2-1, 3-2–3-5
address spaces, 3-2, 3-4
external memory, 3-5
instruction set, 5-1
SFR space, 3-5
See also Binary and source modes
CompuServe, 1-7
Configuration
external memory, 4-8
overview, 4-1
wait states, 4-1–4-2
Configuration array, 4-1–4-4
on-chip, 4-2
Configuration bits, 4-4–4-6
UCON bit, 4-4
Configuration bytes, 4-1
bus cycles, 13-15
programming and verifying, 14-1
UCONFIG0 (table), 4-6
UCONFIG1 (table), 4-7
Control instructions, 5-1, 5-12–5-16
addressing modes, 5-12, 5-13
table of, A-24
Core, 2-4
SFRs, 3-18, C-3
CPL instruction, 5-9, 5-11, A-17, A-23
CPU, 2-5
block diagram, 2-5
Crystal
for on-chip oscillator, 11-3
CY flag, 5-18, 5-19, C-20
D
DA instruction, A-16
Data instructions, 5-1, 5-4–5-10
addressing modes, 5-4
Data pointer, See DPH, DPL, DPTR, DPX, DPXL
Data transfer instructions, 5-10
table of, A-22
See also Move instructions
Data types, 5-2
Datasheets
on WWW, 1-7
DEC instruction, 5-8, A-16
Destination register, 5-3
Device
signal descriptions, B-3
dir16, A-3
dir8, A-3
Direct addressing, 5-4
in control instructions, 5-13
Displacement addressing, 5-4, 5-8
DIV instruction, 5-9, A-16
Division, 5-9
DJNZ instruction, A-25
Documents
ordering, 1-7
related, 1-5
DPH, DPL, 3-15, C-12
as SFRs, 3-17, 3-18, C-2, C-3
DPTR, 3-15
in jump instruction, 5-13
DPX, 3-5, 3-13, 3-15, 5-4
DPXL, 3-15, C-13
as SFR, 3-17, 3-18, C-2, C-3
external data memory mapping, 3-5, 5-4, 5-10
reset value, 3-5
E
EA#, 3-8
description, 13-2
ECALL instruction, 5-15, A-24