Intel 8XC251SA User Manual

8XC251SA, SB, SP, SQ USER’S MANUAL
3-14
Instructions in the MCS 51 architecture use the accumulator as the primary register for data
moves and calculations. However, in the MCS 251 architecture, any of registers R1–R15 can
serve for these tasks†. As a result, the accumulator does not play the central role that it has in
MCS 51 microcontrollers.
Figure 3-8. Dedicated Registers in the Register File and their Corresponding SFRs
† Bits in the PSW and PSW1 registers reflect the status of the accumulator. There are no equivalent status
indicators for the other registers.
R11, Accumulator, ACC
DR60 = Extended Stack Pointer, SPX
ACC
63
62
61
60
SPH
SP
S:81H
SP
Stack Pointer
Register File
SFRs
SPH
Stack Pointer, High
S:BEH
DR56 = Extended Data Pointer, DPX
59
58
57
56
DPH
DPL
DPXL
S:82H
DPL
Data Pointer, Low
DPH
Data Pointer Extended, Low
Data Pointer, High
S:83H
DPXL
R10, B Register
B
ACC
B
S:F0H
S:E0H
S:84H
A4152-02
i_mempar.fm5 Page 14 Thursday, June 27, 1996 2:06 PM

Intel 8XC251SA Specifications

General

Brand	Intel
Model	8XC251SA
Category	Microcontrollers
Language	English