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Intel Celeron D User Manual

Intel Celeron D
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48 Intel
®
Celeron
®
D Processor in the 775-Land LGA Package Thermal Design Guide
Order #303730
Case Temperature Reference Methodology
NOTE: Three axes set consists of (1 each U-31CF), (1 each UX-6-6), (1 each USM6) and (1 each UPN) More
information is available at: http://www.narishige.co.jp/you_ltd/english/products/set/you-set.htm#3
D.13 Thermal Calibration and Controls
It is recommended that full and routine calibration of temperature measurement system be
performed before attempting to perform temperature case measurement of TTVs and live products.
Intel recommends checking the meter probe set against known standards. This should be done at
0 °C (using ice bath or other stable temperature source) and at an elevated temperature, around
80 °C (using an appropriate temperature source).
Wire gauge and length also should be considered as some less expensive measurement systems are
heavily impacted by impedance. There are numerous resources available throughout the industry to
assist with implementation of proper controls for thermal measurements.
Note: It is recommended to follow company standard procedures and wear safety items like glasses for
cutting the IHS and gloves for chemical handling.
Note: Ask your Intel field sales representative if you need assistance to groove and/or install a
thermocouple according to the reference process.
Thermocouple Omega *,40 gauge, “T” Type 5SRTC-TT-T-40-72
Calibration and Control
Ice Point Cell
Omega*, stable 0 ºC temperature source for calibration and
offset
TRCIII
Hot Point Cell
Omega*, temperature source to control and understand meter
slope gain
CL950-A-110
Table 9. Supporting Test Equipment (Sheet 2 of 2)
Item Description Part Number

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Intel Celeron D Specifications

General IconGeneral
Processor FamilyIntel Celeron D
ArchitectureNetBurst
Number of Cores1
SocketLGA 775
FSB Speed533 MHz
Operating Voltage1.25V-1.4V
Virtualization TechnologyNo
Integrated GraphicsNo
Core NamePrescott
Core SteppingD0
Clock Speed3.6 GHz
L1 Cache16 KB
Process Technology90 nm
Instruction SetSSE, SSE2, SSE3
L2 Cache256 KB - 512 KB

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