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Intel i960 - Page 222

Intel i960
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Language Implementation
7-33
7
The compiler stores saved registers in contiguous locations, starting at
offset
0x40 from the frame pointer, as follows:
g0 at 0x40(fp)
g4 at 0x50(fp)
g8 at 0x60(fp)
fp at 0x7c(fp)
In processors with on-chip floating-point support, the compiler saves
floating-point registers
fp0 through fp3 starting at 0x80(fp).
An interrupt handler must not have parameters or return a value.
volatile int ready=0
int poll()
{
while (!ready)
;
} return ready;
#pragma interrupt(foo)
void foo(void)
{
ready=1;
}
NOTE. If an interrupt function accesses variables that are also accessed
by the program, those variables should be declared
volatile. If ready
is not declared volatile, the optimizer may think that ready is always zero
in function
poll and may create an infinite loop by removing the test for
(
!ready).
Note that
pragma interrupt and pragma isr (described below) differ
only in where the registers are saved. For
pragma interrupt, the
registers are saved at known offsets. For
pragma isr, the compiler makes
a context-specific choice of where to save the registers.

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