Intel i960 - Mcore Supported Architectures

gcc960 Compiler Driver
2-41
2
At runtime, the dispatcher decompresses the
function bodies and transfers control to them.
This mechanism saves runtime memory.
See the discussion of
#pragma cave in Chapter 7
for information on this option.
mcmpbr | mno-cmpbr Generate/do not generate code that uses
compare-and-branch instructions whenever
possible.
mcode-align | Generate/do not generate alignment directives
mno-nocode-align prior to labels that are not entered from above.
mcode-align is the default when the Cx or Hx
architecture is specified.
mcore0 | mcore1 | generate code that is compatible with multiple
mcore2 | mcore3 | i960 processor types. Additionally, when you
use an
-mcore option, you can include another
-A switch to generate code that is optimized for a
particular architecture, but still compatible with a
group of architectures. The table below lists the
architectures that are supported by each
-mcore
option and the -A options that you can use with
them.
Table 2-4 Mcore Supported Architectures
Option Name Compatible Architectures
Can Be Used With
Mcore0 Jx, Hx, RP
-AJA, -AJD, -AJF, -AHA,
-AHD, -AHT, or -ARP
Mcore1 Kx, Sx, Cx, Jx, Hx
Any architecture option
except -ARP
Mcore2 Jx, Hx
-AJA, -AJD, -AJF, -AHA,
-AHD, or -AHT
Mcore3 Cx, Jx, Hx
-ACA, -ACF, -AJA, -AJD,
-AJF, -AHA, -AHD, or
-AHT