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Intel i960 - Page 249

Intel i960
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i960 Processor Compiler User's Guide
7-60
7
f Allows any floating-point register fp0 through
fp3. This
constraint
is only valid for the i960
KB and i960 SB processors and only then if the
gcc960
msoft-float option is not used.
m Allows any memory operand.
I Allows a constant in the range 0 through 31.
This is the allowable range for a literal value in
most instructions for the i960 processor.
n Allows a known 32-bit constant.
i Allows a 32-bit constant including a constant
address.
G Allows a floating-point constant of 0.0.
H Allows a floating-point constant of 1.0.
F Allows a floating point constant with any value.
0-9 This is a matching
constraint
. An operand
that matches operand
n (0-9) is allowed. If
used, this must be the only character in the
constraint
. The specified operand must be an
output-spec
, and the
constraint
in which the
matching
constraint
appears must be an
input-spec
. The
asm-template
should not
refer to this operand, only to the operand
n
specified. This constraint is often used to ensure
that an input operand and an output operand are
in the same register. Generally, this is
unnecessary on the i960 architecture.

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