Intel i960 - Page 254

Language Implementation
7-65
7
into a two-word register. Similarly, in1 and in2 must match at least
one of their
constraints because their size and alignment is the
same as that required for a value in a word register.
Compile this example using:
gcc960 -S -O2 emul.c
NOTE. That no extra code is generated to set up operands for the emul
asm
.
Example 4: synmovq.c
The following example refers to the short C program shown in
Example 7-4 below. The asm containing the synmovq instruction is
shown in bold.
Example 7-4 synmovq.c
struct IAC_record {
unsigned short field2;
unsigned char field1;
unsigned char message_type;
unsigned long field3;
unsigned long field4;
unsigned long field5;
};
struct IAC_record Cent_IAC_Space = { 0,0x60,0x40,0,0,0 };
static __inline__ void
post_interrupt(struct IAC_record *IAC_p)
{
struct IAC_record *IAC_dst = (struct IAC_record *)0xFF000010;
__asm__ volatile ("synmovq %2,%3" : "=m"(*IAC_dst)
: "m"(*IAC_p),"d"(IAC_dst),"d"(IAC_p)); }