Intel i960 - Page 336

Index
Index-1
A
a (ANSI) ic960 option, 3-21
A (Architecture)
gcc960 option, 2-18
ic960 option, 3-19
Additional Fine-tune (f) ic960 option, 3-32
aggregates
alignment, 7-4, 7-14
data types, 7-4
aliasing rules, 12-1
alignment
aggregates, 7-4
assumptions, 12-3
bit field, 7-10
inquiries, 7-48
long double, 7-4
natural, 7-7
padding, 7-6
pragma examples, 7-11
scalars, 7-4
sizeof, 7-4
structures, 7-5, 7-7
alternate keywords, 7-51
ANSI (a) ic960 option, 3-21
ansi (ANSI) gcc960 option, 2-19
Architecture (A)
gcc960 option, 2-18
ic960 option, 3-19
architecture macros, and compatibility, 8-2
architecture-specific optimization, 11-1
argument block
passing parameters in, 7-17
registers, 7-17
argument category, general-register variable,
7-79
arithmetic on pointers, 7-45
arrays of length zero, 7-44
arrays, alignment, 7-4
asm function
argument category, 7-79
template expansion, 7-72
asm function definition syntax, 7-71
asm statements, 7-53
Assembly (S) gcc960 option, 2-48
assembly output, saving, 3-56
B
b (Limit-optimizations) ic960 option, 3-23
backslash (\) character, 1-6
Big-endian (G) gcc960 option, 2-33
bit field alignment, 7-10
branch prediction, 11-10, 11-22