Intel PENTIUM P6000 - DATASHEET 2010 - Figure 8-21 BGA1288 Ballmap (Top View, Upper-Left Quadrant)

Datasheet 137
Processor Pin and Signal Information
Figure 8-21.BGA1288 Ballmap (Top View, Upper-Left Quadrant)
717069686766656463626160595857565554535251504948474645444342414039383736
BV
DC_TE
S
T_BV71
DC_TES
T_BV69
DC_TE
S
T_BV68
VSSVSS
SB_DQ
S[
6]
SB_DQ[
4
8]
SB_DQ[
4
7]
SB_DM[
5
]
SB_DQ
S
#[5]
SB_DQ[
3
8]
SB_DQ[
3
7]
SB_DQ[
3
4]
SB_DQ[
3
3]
SB_DM[
4
]
SB_ODT[
0]
SB_BS[0] SB_BS[1]
SM_RC
O
MP[2]
SB_CK[1]
SA_MA[2
]
BU
SB_DM[
6
]
SB_DQ
S
#[6]
VSS
SB_DQ[
4
6]
VSS
SB_DQS[
5]
VSS
SB_DQ[
4
1]
VSS
SB_OD
T
[
1]
VSS
SB_CA
S
#
VSS
SB_MA[1
0]
VDDQ
SB_CK#[
1]
VSS
BT
DC_TE
S
T_BT71
DC_TES
T_BT69
VSS
SB_DQ[
5
3]
SB_DQ[
4
2]
SB_DQ[
4
3]
SB_DQ[
4
5]
SB_DQ[
3
9]
SB_DQ
S
#[4]
SB_DQS[
4]
SB_DQ[
3
2]
SB_DQ[
3
6]
SB_MA[1
3]
SB_CS
#
[
1]
SB_WE#
SB_RAS
#
SA_BS[0]
SA_MA[0
]
BR
DC_TE
S
T_BR71
VSSVSS
SB_DQ[
5
0]
SB_DQ[
5
1]
SB_DQ[
5
2]
BP
SB_DQ[
4
9]
SA_DQ
S
#[6]
SB_DQ[4
4]
SB_DQ[
4
0]
SB_DQ[
3
5]
SB_CS
#
[
0]
VSS
SM_RC
O
MP[1]
BN
VSS
SB_DQ[
5
4]
SA_DQ[
5
0]
VSS
SA_DM[
6
]
SA_DQ[
4
9]
SA_DQ[
4
7]
SA_DQ[
4
1]
SA_DQ[
4
0]
SA_DQ[
3
9]
SA_DQ[
3
8]
SA_DQ[
3
6]
VDDQ
BM
VSS
SA_DQS[
6]
SA_DQ[
4
6]
VSSVSS
SA_DQ[
3
3]
BL
VSS
SB_DQ[5
5]
VSSVSSVSS
SA_OD
T
[
1]
VSS
SA_RA
S
#
BK
SB_DQ[
6
0]
SB_DQ[
6
1]
SA_DQ[
5
4]
VSS
SA_DQ[
5
5]
VSSVSS
SA_DQ
S
#[5]
SA_DQ
S[
4]
SA_CA
S
#
SA_CK[1
BJ
SB_DQ[
5
6]
SB_DQS[
7]
SA_DQ[
6
0]
VSS
SA_DQ[
5
6]
SA_DQ[
5
1]
SA_DQ[
5
3]
SA_DQ[
4
3]
SA_DQ[
4
5]
SA_CS#[
1]
SA_DQ[
3
2]
VDDQ
BH
VSS
SA_DM[
7
]
VSSVSS
SA_DQ[
4
2]
SA_DQ
S[
5]
SA_DQ[
4
4]
VSS
SA_DQ
S
#[4]
SA_DQ[
3
7]
SA_CS#[
0]
SA_BS[1]
SA_CK#[
1]
BG
SB_DQ[
5
8]
SB_DQ
S
#[7]
SA_DM[
5
]
VSS
SA_DM[
4
]
VDDQ VSS
BF
SB_DQ[
5
7]
SB_DM[
7
]
SA_DQ[
6
1]
SA_DQ[
5
7]
VSSVTT0 VTT0
SA_DQ[
5
2]
SA_DQ[
4
8]
SA_DQ[
3
5]
SA_DQ[
3
4]
SA_OD
T[
0]
SA_MA[1
3]
SA_WE#
BE
RSVD VSS RSVD VSS
SA_DQ
S[
7]
SA_DQ
S
#[7]
BD
SB_DQ[
6
2]
SB_DQ[6
3]
VTT0 VTT0 VSSVCAP0VSSVCAP0VSSVCAP0VSSVCAP1VSSVCAP1VSSVCAP1
BC
SA_DQ[
6
3]
SB_DQ[
5
9]
BB
VSS RSVD
SA_DQ[
5
9]
SA_DQ[
5
8]
VSSVTT0 VTT0 VSSVCAP0VSSVCAP0VSSVCAP0VSSVCAP1VSSVCAP1VSSVCAP1
BA
VSS
AY
VSS RSVD VSS
SA_DQ[
6
2]
VSSVTT0 VSSVCAP0VSSVCAP0VSSVCAP0VSSVCAP1VSSVCAP1VSSVCAP1VSS
AW
RSVD VSSVSSVTT0 VSSVCAP0VSSVCAP0VSSVCAP0VSSVCAP1VSSVCAP1VSSVCAP1VSS
AV
RSVDRSVD
PM_EX
T
_TS#[0]
PM_EX
T
_TS#[1]
AU
RSVD VSS RSVD VSSVTT0 VTT0 VSSVCAP0VSSVCAP0VSSVCAP0VSSVCAP1VSSVCAP1VSSVCAP1
AT
RSVDRSVD VSS
AR
RSVDRSVD VSSVTT0 VTT0 VSSVCAP0VSSVCAP0VSSVCAP0VSSVCAP1VSSVCAP1VSSVCAP1
AP
VSS RSVD VSS
AN
GFX_VI
D
[4]
RSVD VSSVTT0 VTT0 VCAP0VSSVCAP0VSSVCAP0VSSVCAP1VSSVCAP1VSSVCAP1VSS
AM
GFX_VI
D
[6]
GFX_VI
D
[5]
RSVD VSS
AL
GFX_D
P
RSLPV
R
GFX_IM
ON
VSSVTT0 VTT0 VCAP0VSSVCAP0VSSVCAP0VSSVCAP1VSSVCAP1VSSVCAP1VSS
AK
RSVD VSS RSVDRSVD VSSVCAP2VCAP2VCAP2VCAP0VSSVCAP0VSSVCAP0VSSVCAP1VSSVCAP1VSSVCAP1VSS
AJ
VSS