Intel® Quiet System Technology (Intel® QST)
60 Thermal and Mechanical Design Guidelines
6.2 Board and System Implementation of
Intel
®
Quiet System Technology
To implement the board must be configured as shown in Figure 21 and listed below:
ME system (S0–S1) with Controller Link connected and powered
DRAM with Channel A DIMM 0 installed and 2 MB reserved for Intel QST FW
execution
SPI Flash with sufficient space for the Intel QST Firmware
SST-based thermal sensors to provide board thermal data for Intel QST algorithms
Intel QST firmware
Figure 21. Intel
®
Quiet System Technology Platform Requirements
Processor
ME
SPI
Flash
Intel®
ICH8
DRAM
Controller Link
DRAM
FSC
Control
SPI
SST
Sensor
Intel® (G)MCH
ME
Note: Simple Serial Transport (SST) is a single wire bus that is included in the ICH8 to
provide additional thermal and voltage sensing capability to the Manageability Engine
(ME)