Test 101.3 — TESTCAL
Bank A/D
Inputs Open
Expected Value 1.03 volts
Limits 0.06 volts
Fault Message NO 1V AT A/D
Description
This test uses the default conditions of the ADC word and the ACDC
word. This sets up the front end of the instrument to a stable configuration.
The MUX word sets shift register U130 to disable U163 by setting line /EN
low. The /EN line is also connected to pin 16 of U129 which closes the mux
switch for pins 14 and 15. This connects the voltage between R189 and R185
(around 1.03 volts) to op amp U166, which is configured for
×
1 gain with
feedback through U129 (pin 2 to 3). The buffered value of the signal is then
connected to the A/D at A/D-IN.
A conversion is taken and compared to the calibration values in tests 101.1
and 101.2, and displayed as a voltage. Measure 1.03V at A/D-IN. Primary
tests are on the resistor divider (R189, R185, and R188), the MUX U163, and
the signal path from the resistor divider.
Bit patterns
Bit pattern Register
QQ
87654321
—U106—
110v1111
QQ
87654321
—U109—
00101111
QQ
87654321
—U134—
1v10000v
—U130—
11111100
QQ
87654321
—U121—
01110010
ACDC_STB
MUX_STB
IC pins: Q8=11, Q7=12, Q6=13, Q5=14, Q4=7, Q3=6, Q2=5, Q1=4
Troubleshooting 2-27