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TEST BANK: SENSE

Test 500.1 — 4W SENSE

Bank SENSE

Inputs 4-wire short

Expected Value 0 volts

Limits 0.0001 volts

Fault Message SENSE LO

Description This test requires a 4-wire short at the input. The SLO node is the Sense

LO jack on the front or rear panel. The 4-wire short connects SLO to LO. The

0V signal at SLO is routed through R132, R139, R148, R163, and Q121 to

U126, which is conﬁgured as a unity gain buffer. The 0V output of U126 is

routed to S7 of U163 where it is switched to the A/D MUX (×1 gain). Mea-

sure 0V at AD_IN.

Bit patterns

Bit pattern Register

87654321

—U106—

110v1111

87654321

—U109—

00101111

87654321

—U134—

1v10000v

—U130—

01011101

87654321

—U121—

01110010

ACDC_STB

MUX_STB

IC pins: Q8=11, Q7=12, Q6=13, Q5=14, Q4=7, Q3=6, Q2=5, Q1=4

2-52 Troubleshooting

Keithley 2000 Repair Manual

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