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Kirisun DP485 User Manual

Kirisun DP485
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DP485 Service Manual
9
3C: Transistor X500 (12.8M TCXO)
5T: RF Pre-drive Amplifier Circuit Q502 (2SC5108), Q503 (2SC3356)
DC-DC: PMU IC1 (HS8851), U500 (RDA1846S)
4.7.IC Description
4.7.1.Features of AT1846S
a. Integrated CMOS RF front-end
b. High linearity low-noise amplifier and mixer
c. Low IF receiver path
Automatic DC offset calibration circuit
High performance analogue/digital converter and digital/analogue converter
Fully-integrated receiver filter
Digital AGC
Modulation and demodulation technique based on digital signal processing technology
d. TX path of direct frequency synthesis
Modulation method of direct frequency synthesis
TX filter based on digital signal processing technology
TX modulation gain number is adjustable
Digital voice activates TX control
e. High-performance fractional PLL frequency synthesizer
Fully-integrated in-chip RF VCO
Fully-integrated internal loop filter
Low phase noise
Fast lock of phase
High-frequency resolution with random frequency adjustable
Built-in transistor frequency error calibration circuit
f. Sleep mode of ultra-low loss
g. Three wire serial digital interface control

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Kirisun DP485 Specifications

General IconGeneral
Frequency136~174 MHz, 400~470 MHz
Channel Capacity256 channels
Channel Spacing25 kHz/12.5kHz
Antenna Impedance50Ω
Operating Voltage7.4V
Rated Power1W 16Ω
Transmitting Power4W/1W@7.4V DC
Current Consumption≤1.5A@ 7.4V DC
Working Temperature-25℃~ +55℃
Microphone Impedance2.2kΩ
BatteryLithium-ion battery DC 7.4V , 2000mAh
Receiving Sensitivity (12dB SINAD )-120dBm
Squelch Sensitivity (3-level)≤-120dBm
Selectivity of Adjacent Channels70dB@25KHz /60dB@12.5KHz
Intermodulation Immunity65dB@25KHz/12.5 KHz
Blocking84dB
Frequency Stability≤±2.5ppm
Maximum Modulation Offset±5kHz@25KHz /±2.5kHz@12.5KHz
Modulation Distortion≤3%
Spurious Emission≤-36dBm

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