5
System Commands
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Bit
15..8
7
6
5
4
3
2
1
0
Bit Value
128
64
32
16
8
4
2
1
Bit Name
PeN
URQ
CME
EXE
DDE
QYE
RQC
OPC
Description
0 Reserved by IEEE 488.2
1 a Power off-to-ON transition has occurred
1 a User ReQuest has been issued
1 a CoMmand parser Error has been found
1 an Execution Error has been detected
1 a Device Specific Error has occurred
1 a QueRy Error has occurred
0 The Instrument never requests bus control
0 The OPeration Complete bit Is not used
Note
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(a)
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Standard Event Status Register (ESR)
Table 5
Notes:
(1) The Power On (PEN) bit Is always turned on (1) when the unit Is powered
(2)
The User Request (URQ) bit is set true (1) when a soft key Is pressed. An associated register URR Identifies
which key was selected, For further details refer to the URR? query.
(3)
The CoMmand parser Error bit (CME) Is set true ( 1 ) whenever a command syntax error Is detected. The
bit has an associated CoMmand parser Register (CMR) which specifies the error code, Refer to the query
CMR? for further details,
(4) The EXecution Error bit (EXE) Is set true (1) when a command cannot be executed due to some device
condition (e.g. oscilloscope in local state) or a semantic error.The EXE bit has an associated Execution Error
Register (EXR) which specifies the error code. Refer to query EXR? for further details,
(5) The Device specific Error (DDE) Is set true (1) whenever a hardware failure has occurred at power-up
execution time such as a channel overload condition, a trigger or a time-base circuit defect, The origin of the
failure may be localized via the DDR? or the self test *TST? query,
(6)
The Query Error bit (QYE) Is set true (1) whenever (a) an attempt Is being made to read data from the
Queue when no output Is either present or pending, (b) data in the Output Queue has been lost, (c)
output and Input buffers are full (deadlock state), (d) an attempt Is made by the controller to read before
having sent an<END>, (e) a command Is received before the response to the previous query was read (output
buffer flushed).
(7) The ReQuest Control bit (RQC) Is always false (0) since the oscilloscope has no GPIB controlling capability.
(8) The OPeration Complete bit (OPC) Is set true (1) whenever *OPC has been received since commands
queries are strictly executed In sequential order, The oscilloscope starts processing a command only once the
previous command has been entirely executed.
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