Microtest 6375 - Page 45

6–7
BIT
Meaning True = ‘1’
3
A summary bit from Questionable Data. This bit is not used, so is always 0.
2
This is a summary bit of error and instrument status messages. True if any
new status information is available.
1
Always 0.
0
Always 0.
Service
Request
Generation
Logical OR
Service Request
Enable Registert
*SRE <NR1> *SRE
read by *STB?
Status Bit Register
read by Serial Poll
{
{
ESB MAV QUES Operation Status Event Summary Bit Instrument Error & Status Summary Bit
Figure 6-5 Status Byte Register
6.1.6.2 Service Request Enable Register
The service request enable register (SRE) is a mask determining the conditions in which the
SBR will generate a service request. It is bit-wise ANDed with the SBR and if the result is not
zero then bit 6 of the SBR is set (see Figure 6-5). The SRE is set by the *SRE command and
read by the *SRE? command.