3. INSTRUCTION STRUCTURE
3 − 11
MELSEC-A
(5) In the following cases, the basic instruction and application instruction result in
operation error.
(a) When the index qualification is performed and the device range has been
exceeded. In this case, however, K and H are excluded.
Index Circuit Example Judgement
Z = -10
Since T(9 + (-10)) = T - 1, operation error occurs.
Z = 10
Since D(1020 + 10) = D1030 and the range of D0 to 1024
is exceeded, operation error occurs.
Z = 10
Since K(32767 + 10) = K - 32759, operation error does
not occur.
(32767 + 10) → (7FFF
H + AH) → (8009H) → -32759
(b) When the index qualification is performed and the head number of bit
device has exceeded the corresponding device range.
Index Circuit Example Judgement
Z = 15
Although K4B3FF (B(3F0 + F) = B3FF) is specified,
operation error does not occur.
Z = 16
Since K4B400 (B(3F0 + 10) = B400) is specified and the
corresponding device range is exceeded, operation error
occurs.
POINT
When an AnA, A2AS or AnU is used, the above specification does not cause
operation error and the sequence program incorrectly runs. (See Section 3.8.4
for details.)
(6) When an AnA, A2AS or AnU is used, index qualification can be performed also
to bit devices used for the LD, OUT, and other instructions.
X010
K-
MOV 10 Z
X011
Z
MOV T9 D0
X010
K
MOV 10 Z
X011 Z K4
MOV D1020 Y033
X010 K
MOV 10 Z
X011 K Z
MOV 32367 D0
X010 K
MOV 15 Z
X011
K4 Z
MOV B3F0 D0
X010 K
MOV 16 Z
X011
K4 Z
MOV B3F0 D0
Fig. 3.8 Ladder Example and Judgements
Fig. 3.9 Ladder Examples and Judgements
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