2. INSTRUCTIONS
2 − 5
MELSEC-A
2.2.2 Sequence instructions
(1) Contact instructions
Table 2.3 Contact Instructions
Classi-
fication
Unit
Instruction
Symbol
Symbol Contents of Processing
Execu-
tion Con-
dition
Number
of steps
Index
Subset
Applicable CPU Page
LD
Logical operation start
(NO contact operation start)
1
!
5-2
LDI
Logical NOT operation start
(NC contact operation start)
1
!
5-2
AND
Logical product
(NO contact series connection)
1
!
5-2
ANI
Logical product NOT
(NC contact series connection)
1
!
5-2
OR
Logical add
(NO contact parallel connection)
1
!
5-2
Contact
ORI
Logical add NOT
(NC contact parallel connection)
1
!
5-2
(2) Connection instructions
Table 2.4 Connection Instructions
Classi-
fIcation
Unit
Instruction
Symbol
Symbol Contents of Processing
Execu-
tion Con-
dition
Number
of steps
Index
Subset
Applicable CPU Page
ANB
ANDs logical blocks.
(Series connection of blocks)
1
!
5-5
ORB
Ors logical blocks.
(Parallel connection of blocks)
1
!
5-5
MPS Stores the operation result. 1
!
5-9
MRD
Reads the operation result
from MPS
1
!
5-9
Connec-
tion
MPP
Reads the operation result from
MPS and clears the result.
1
!
5-9
*1: For the number of steps when extension devices are used or when index qualification is performed to
bit devices for AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board, refer to Section 3.8.1.
*2: The
mark in the Index column indicates that index qualification can be performed with the AnA,
A2AS, AnU, QCPU-A (A Mode) and A2USH board only.
*3: The
mark in the Subset column indicates that subset processing can be performed with the A3H,
A3M, AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board only.
*2
*2
*2
*2
*2
*2
*1
*1
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