Mitsubishi MELSEC Q Series Programming Manual

A-10
6.4.8 Identical 32-bit data block transfers (DFMOV(P))..................................................... 6 - 125
6.4.9 16-bit and 32-bit data exchanges (XCH(P),DXCH(P)) ............................................. 6 - 127
6.4.10 Block 16-bit data exchanges (BXCH(P)) .................................................................. 6 - 129
6.4.11 Upper and lower byte exchanges (SWAP(P)) .......................................................... 6 - 131
6.5 Program Branch Instructions 6 - 132
6.5.1 Pointer branch instructions (CJ,SCJ,JMP) ............................................................... 6 - 132
6.5.2 Jump to END (GOEND)............................................................................................ 6 - 135
6.6 Program Execution Control Instructions 6 - 136
6.6.1 Interrupt disable/enable instructions, interrupt program mask (DI,EI,IMASK) .......... 6 - 136
6.6.2 Recovery from interrupt programs (IRET) ................................................................ 6 - 143
6.7 I/O Refresh Instructions 6 - 145
6.7.1 I/O refresh (RFS(P)) ................................................................................................. 6 - 145
6.8 Other Convenient Instructions 6 - 147
6.8.1 Counter 1-phase input up or down (UDCNT1) ......................................................... 6 - 147
6.8.2 Counter 2-phase input up or down (UDCNT2) ......................................................... 6 - 150
6.8.3 Teaching timer (TTMR) ............................................................................................ 6 - 153
6.8.4 Special function timer (STMR).................................................................................. 6 - 155
6.8.5 Rotary table shortest direction control (ROTC) ........................................................ 6 - 158
6.8.6 Ramp signal (RAMP)................................................................................................ 6 - 161
6.8.7 Pulse density measurement (SPD) .......................................................................... 6 - 164
6.8.8 Fixed cycle pulse output (PLSY) .............................................................................. 6 - 166
6.8.9 Pulse width modulation (PWM) ................................................................................ 6 - 168
6.8.10 Matrix input (MTR).................................................................................................... 6 - 170
7. APPLICATION INSTRUCTIONS 7 - 1 to 7 - 460
7.1 Logical operation instructions 7 - 2
7.1.1 Logical products with 16-bit and 32-bit data (WAND(P),DAND(P)).............................. 7 - 3
7.1.2 Block logical products (BKAND(P)) .............................................................................. 7 - 9
7.1.3 Logical sums of 16-bit and 32-bit data (WOR(P),DOR(P))......................................... 7 - 11
7.1.4 Block logical sum operations (BKOR(P)).................................................................... 7 - 17
7.1.5 16-bit and 32-bit exclusive OR operations (WXOR(P),DXOR(P)) .............................. 7 - 19
7.1.6 Block exclusive OR operations (BKXOR(P)) .............................................................. 7 - 25
7.1.7 16-bit and 32-bit data exclusive NOR operations (WXNR(P),DXNR(P)).................... 7 - 27
7.1.8 Block exclusive NOR operations (BKXNR(P))............................................................ 7 - 33
7.2 Rotation instruction 7 - 35
7.2.1 Right rotation of 16-bit data (ROR(P),RCR(P)) .......................................................... 7 - 35
7.2.2 Left rotation of 16-bit data (ROL(P),RCL(P)) .............................................................. 7 - 38
7.2.3 Right rotation of 32-bit data (DROR(P),DRCR(P)) ..................................................... 7 - 41
7.2.4 Left rotation of 32-bit data (DROL(P),DRCL(P))......................................................... 7 - 44
7.3 Shift instruction 7 - 46
7.3.1 n-bit shift to right or left of 16-bit data (SFR(P),SFL(P)) ............................................. 7 - 46
7.3.2 1-bit shift to right or left of n-bit data (BSFR(P),BSFL(P)) .......................................... 7 - 49
7.3.3 n-bit shift to right or left of n-bit data (SFTBR(P),SFTBL(P)) ...................................... 7 - 51
7.3.4 1-word shift to right or left of n-word data (DSFR(P),DSFL(P)) .................................. 7 - 54
7.3.5 n-bit shift to right or left of n-word data (SFTWR(P),SFTWL(P)) ................................ 7 - 56
7.4 Bit processing instructions 7 - 59

Mitsubishi MELSEC Q Series Specifications

General

Brand	Mitsubishi
Model	MELSEC Q Series
Category	Controller
Language	English