3-10 Theory of Operation: Transceiver Board
3.1.2.4 700/800 Front-End
From the attenuator, U1149, a 700 MHz or 800 MHz band signal is routed to an SPST band select
switch, U402, which selects the 700 or the 800 band signal and routes it to the appropriate first pre-
selector filter, FL401. A second band select switch, U404, selects the output of the appropriate filter
and applies it to an LNA followed by a similar pre-selector filter/ band-select switch circuit. The signal
is then routed to second LNA, U407, whose output is applied to a discrete image filter. Both
preselector filters are Surface Acoustic Wave designs (EPCOS B4232) used to band limit the
received energy and suppress known spurious responses such as Image and the ½ IF spur. The
output of the discrete image filter is applied to the RF port of the Mixer IC, U506, via a balun
transformer, T503. The Mixer IC is driven by an LO signal generated by the Trident synthesizer IC,
U702, and applied to the LO port to down-convert the RF signal to a 109.65 MHz intermediate
frequency (IF). The IF signal is passed through a crystal filter, FL501, and an IF amplifier, Q503,
which drive the input of the Analog to Digital Converter IC, U601.
3.1.2.5 Analog To Digital Converter
The ADC used in APX/ SRX is the AD9864 IC, U601, from Analog Devices. The IC front end down
converts the first IF to a second IF, a 2.25 MHz signal, by mixing a 107.4 MHz LO signal generated
by an integrated synthesizer and external VCO with active device U602 and resonator L604. The
second IF is sampled at 18 MHz, a signal generated by an integrated clock synthesizer and VCO
device with external resonator L605.
The sampled signal is decimated by a factor of 900 to 20 kHz and converted to SSI format at the
ADC's output. The Serial Synchronous Interface (SSI) serial data waveform is composed of a 16 bit
in-phase word (I) followed by a 16 bit Quadrature word (Q). A 20 kHz Frame Synch and 1.2MHz
clock waveform are used to synchronize the SSI IQ data transfer to the Digital Signal Processor IC
(OMAP) for post-processing and demodulation. The clock frequency is adjustable and is selected
automatically by software to prevent self quieting.
3.1.3 Transmitter
The transmitter takes modulated RF from the FGU and amplifies it to the rated output power to
produce the modulated carrier at the antenna.
NOTE: Refer to Table 8-1, “List of Transceiver Schematics and Board Overlays,” on page 8-1 for a
listing of transmitter-related schematics that will aid in the following discussion.
The transmitter (Figure 3-8 on page 3-11) for the VHF radio consists of one LDMOS high power
transistor for the VHF band. The same topology applied for the 7/800 radio
(Figure 3-10 on page 3-12) where one LDMOS high power transistor is used for the 7/800 MHz
band. Similarly for UHF1 and UHF2 radios, one LDMOS transistor is used to cater for the UHF1/
UHF2 band which is depicted by Figure 3-9 on page 3-11. The high power transistor is driven by an
RF driver IC that receives its input signal from the voltage controlled oscillator. Transmitter power is
controlled by a discrete power control circuit that senses the output of a directional coupler and
adjusts PA control voltage to maintain the correct power level. The TX signals pass through their
respective harmonic filters, a TX/RX switch, and embedded directional coupler, a RF switch and then
the antenna. The SP2T switch just before the antenna does not exist on the VHF radio.
The UHF1 SRX 2200 is available with a low power setting that limits the transmit power to 0.25 watt.
The rest of the APX 5000/ APX 6000 radios and the SRX 2200 VHF radio are able to be limited to
1 watt minimum output power.
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