© National Instruments | 7-1
7
Digital Routing,
Clock Generation, and
Synchronization
This chapter describes digital routing, clock routing circuitry, and timebase synchronization on
the cDAQ chassis. Refer to the Digital Routing, Clock Routing, and Synchronization across a
Network sections.
Digital Routing
The digital routing circuitry has the following functions:
• Manages the flow of data between the bus interface and the acquisition/generation
sub-systems (analog input, analog output, digital I/O, and the counters). The digital routing
circuitry uses FIFOs (if present) in each sub-system to ensure efficient data movement.
• Routes timing and control signals. The acquisition/generation sub-systems use these
signals to manage acquisitions and generations. These signals can come from the following
sources:
– Your C Series modules
– User input through the PFI terminals using parallel digital C Series modules or the
cDAQ chassis PFI terminals
• Routes and generates the main clock signals for the cDAQ chassis. To determine the signal
routing options for C Series module(s) installed in the cDAQ chassis, refer to the Device
Routes tab in MAX.
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