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Chapter 4 Analog Output
AO Sample Clock Signal
The AO sample clock (ao/SampleClock) signals when all the analog output channels in the task
update. AO Sample Clock can be generated from external or internal sources as shown in
Figure 4-1.
Figure 4-1. Analog Output Timing Options
Routing AO Sample Clock to an Output Terminal
You can route AO Sample Clock to any output PFI terminal. AO Sample Clock is active high
by default.
AO Sample Clock Timebase Signal
The AO Sample Clock Timebase (ao/SampleClockTimebase) signal is divided down to provide
a source for AO Sample Clock. AO Sample Clock Timebase can be generated from external or
internal sources, and is not available as an output from the chassis.
Delta-Sigma Modules
The oversample clock is used as the AO Sample Clock Timebase. The cDAQ chassis supplies
10 MHz, 12.8 MHz, and 13.1072 MHz timebases. When delta-sigma modules with different
oversample clock frequencies are used in an analog output task, the AO Sample Clock Timebase
can use any of the available frequencies; by default, the fastest available is used. The update rate
of all modules in the task is an integer divisor of the frequency of the AO Sample Clock
Timebase.
Programmable
Clock
Divider
AO Sample Clock
Timebase
PFI
Analog Comparison Event
Ctr
n
Internal Output
AO Sample
Clock
Analog Comparison
Event
80 MHz Timebase
20 MHz Timebase
PFI
13.1072 MHz Timebase
12.8 MHz Timebase
10 MHz Timebase
100 kHz Timebase
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