The following bits in the standard event
status enable register have been
implemented:
bit 0 OPC (operation complete)
bit 2 QYE (unterminated query error)
bit 3 DDE (device dependent error)
bit 4 EXE (execution error)
bit 5 CME (command interpretation error)
bit 7 PON (power on event)
For example, *ESE, 60 enables all the
error bits so that the ESB bit in the serial
poll status byte is set in the event of any
error.