NXP Semiconductors MCX-N9 EVK Series - Tamper I;O Header

NXP Semiconductors
UM12036
MCX-N9XX-EVK Board User Manual
Pin number Net Name GPIO Functions Potential conflict
• MCU-Link SPI PCS
4 SCK P0_25 SPI clock line • Arduino connector (J2) pin 12
• MCU-Link SPI SCK
5 MISO P0_26 SPI slave output line • Arduino connector (J2) pin 10
• MCU-Link SPI SDI
6 MOSI P0_24 SPI slave input line • Arduino connector (J2) pin 8
• MCU-Link SPI SDO
7 3V3 P3V3 3.3 V power line -
8 GND GND Ground -
Table 28. J19 header pinout...continued
Pin No. Net name GPIO Functions Potential conflict
1 PWM P1_23 PWM output line Arduino connector (J1) pin 8
2 INT P0_10 Hardware interrupt
line
Arduino connector (J2) pin 4
3 RX P4_3 UART receive line • M.2 connector (J12) pin 20
• Arduino connector (J1) pin 2
4 TX P4_2 UART transmit line • M.2 connector (J12) pin 22
• Arduino connector (J1) pin 4
5 SCL P4_1 I2C clock line -
6 SDA P4_0 I2C data line -
7 5V0 P5V0 5 V power line -
8 GND GND Ground -
Table 29. J22 header pinout
2.15 Tamper I/O header
The MCX-N9XX-EVK provides a header for the Tamper I/O. This is to demonstrate the security features of the
MCX N94x device.
Table 30 describes the tamper header (JP42) pinout.
Pin No. GPIO Function Potential conflict
1 - VDD_BAT -
2 - GND -
3 P5_6 Tamper 4 -
4 P5_7 Tamper 5 -
5 P5_8 Tamper 6 -
6 P5_9 Tamper 7 -
Table 30. Tamper I/O header connections
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User manual Rev. 1 — 20 January 2024
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