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NXP Semiconductors MCX-N9 EVK Series - Page 8

NXP Semiconductors MCX-N9 EVK Series
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NXP Semiconductors
UM12036
MCX-N9XX-EVK Board User Manual
Part
identifier
Jumper type Description Reference section
JP4 1x2 pin header Pin 1-2 open: Disconnects the P3V3 supply from the
LAN8741 Ethernet PHY circuit
Pin 1-2 shorted (default setting): Connects the P3V3
supply to the VDD analog pins of the LAN8741 Ethernet
PHY
Section 2.6
JP5 1x2 pin header Open (default setting): Enables the onboard MCU-Link
USBSIO bridge feature for SPI
Shorted: Sends a low signal on HW_VER_2 to disable the
onboard MCU-Link USBSIO bridge feature for SPI
Section 3.9
JP6 1x2 pin header Open (default setting): Enables the MCU-Link SWD
feature
Shorted: Sends a low signal on HW_VER_7 to disable the
onboard MCU-Link SWD feature
Note: This configuration is required to enable target MCU
debug through an external debug probe.
Section 3.3
JP9 1x2 pin header Open (default setting): No JTAG connection
Shorted: Connects TDI signal to P0_3 port for JTAG
connection
For more information
on this jumper, see
MCX-N9XX-EVK
schematic
JP12 1x3 pin header Target power selection jumper
1-2 shorted (default setting): Onboard target MCU is
used as a debug target or an external target MCU is used
as a debug target but it uses board power
2-3 shorted: An external target MCU is used as a debug
target and it uses its own power
Section 3.3
JP13 1x3 pin header Pin 1-2 shorted (default setting): Port P1 pin 21 (P1_21)
connects to the DA7212 audio codec (DNP) through dual-
supply translating transceiver NTS0302
Pin 2-3 shorted: Port P1 pin 21 connects to the MDIO
interface of the LAN8741 Ethernet PHY
For more information
on this jumper, see
MCX-N9XX-EVK
schematic
JP14 1x2 pin header Pin 1-2 shorted (default setting): VDD_MCU is sourced
from MCU_PWR supply
For more information
on this jumper, see
MCX-N9XX-EVK
schematic
JP15 (DNP) 1x3 pin header Pin 1-2 shorted: VDD_P3 is sourced from the P3V3 power
supply
Pin 2-3 shorted (default setting): VDD_P3 is sourced
from P1V8 supply
Note: VDD_P3 must be 1.8 V for QSPI flash and SIM card
interfaces.
Section 2.1.1
JP17 1x3 pin header Pin 1-2 shorted (default setting): Port P0 pin 11 (P0_11)
connects to SD connector power switch
Pin 2-3 shorted: Port P0 pin 11 connects to the VBUS
controller (NX5P3090UK) of USB FS
Section 2.4
JP18 1x3 pin header Pin 1-2 shorted: VDD_LDO_CORE_IN is sourced from
MCU_PWR power supply
Pin 2-3 shorted (default setting): VDD_LDO_CORE_IN is
sourced from VDD_CORE supply
Section 2.1.1
Table 3. MCX-N9XX-EVK jumpers...continued
UM12036 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved.
User manual Rev. 1 — 20 January 2024
8 / 51

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