Omron SYSMAC CS1W-SCB41-V1 - Page 646

617
K3T @ Intelligent Signal Processor Protocol Appendix L
+3 Status (4 digits Hex) d0 bit:
If overflow:1 Others: 0
d1 bit:
If underflow:1 Others: 0
d2 bit:
Not used
d3 bit:
During forced zero operation:1 Others: 0
(K3TH, K3TR, K3TC: 0)
d4 bit:
In test mode: Others: 0
d5 bit:
While holding input:1 Others: 0
d6 bit:
Bank input 1:1 Others: 0
(K3TH, K3TX: 0)
d7 bit:
Bank input 2:1 Others: 0
(K3TH, K3TX: 0)
d8 bit:
LL comparison output:1 Others: 0
OUT1 comparison output: 1 (K3TC)
d9 bit:
L comparison output:1 Others: 0
OUT2 comparison output:1 (K3TC)
d10 bit:
H comparison output:1 Others: 0
OUT4 comparison output:1 K3TC)
d11 bit:
HH comparison output:1 Others: 0
OUT5 comparison output:1 (K3TC)
d12 bit:
PASS comparison output:1 Others: 0
OUT3 comparison output:1 (K3TC)
d13 bit: Not used
d14 bit: Not used
d15 bit: Not used
•
•
•
+96 Status (4 digits BIN) Same as above
Offset Contents (data format) Data