SECTION 3 Communications Data
38
Com Data
◆ Variable Type C1
Note:The upper limit for twin timers depends on the time unit for the ON time and OFF time settings. For
min:s (M:S) or h:min (H:M), the upper limit is 26E7.
0011 Comparator bit sta-
tus
H'00000000 to H'0000FFFF (-) Bit 0: P0 Bit 8: P8
Bit 1: P1 Bit 9: P9
Bit 2: P2 Bit 10: Pa
Bit 3: P3 Bit 11: Pb
Bit 4: P4 Bit 12: Pc
Bit 5: P5 Bit 13: Pd
Bit 6: P6 Bit 14: Pe
Bit 7: P7 Bit 15: Pf
---
0012 8-digit comparator
operator
H'00000008 to H'00000009 (-) Comparator number specified by
leftmost 2 digits of address.
P.1 9
0013 CPU Unit output bit
status
H'00000000 to H'0000000F (-) Bit 0: Q0
Bit 1: Q1
Bit 2: Q2
Bit 3: Q3 (use as work bit)
---
0014 CPU Unit input bit
status
H'00000000 to H'0000003F (-) Bit 0: I0
Bit 1: I1
Bit 2: I2
Bit 3: I3
Bit 4: I4
Bit 5: I5
---
0015 Expansion I/O out-
put bit status
H'00000000 to H'00000FFF (-) Bits 0 to 3: Expansion 0, Y0 to Y3
Bits 4 to 7: Expansion 1, Y4 to Y7
Bits 8 to 11: Expansion 2, Y8 to
YB
---
0016 Expansion I/O input
bit status
H'00000000 to H'00000FFF (-) Bits 0 to 3: Expansion 0, X0 to X3
Bits 4 to 7: Expansion 1, X4 to X7
Bits 8 to 11: Expansion 2, X8 to
XB
---
0017 8-digit comparator
bit status
H'00000000 to H'0000000F Comparator number specified by
leftmost 2 digits of address.
Bit 0: G0
Bit 1: G1
Bit 2: G2
Bit 3: G3
---
Address Data name Data range (unit) Remarks Page
0000 Timer SV • Timers Other Than Twin Timers
H'00000001 to H'0000270F (S)
H'00000001 to H'000026E7
(M:S)
H'00000001 to H'000026E7
(H:M)
• Twin Timers (See note.)
H'00010001 to H'270F270F (-)
Timer number specified by left-
most 2 digits of address.
00.01 to 99.99 s
00 min 01 s to 99 min 59 s
00 h 01 min to 99 h 59 min
P.1 8
P.2 2
Address Data name Data range (unit) Remarks Page
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