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Panasonic NV-SD440EG/ - Page 65

Panasonic NV-SD440EG/
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H
H
H
L*(49
µ
m)
R'(26µm)
R'(49
µ
m)
L(26µm)
H
AMP
P501
3
10
P3001
CURR.EMPH
23
14
Q3023
AMP
TW3030
TW3001
P501
P3001
32
LP
3
4
8
9
2
5
10
9
5
4
11
8
CONTROL
SYSTEM
FROM
OSD PACK
TO
FSC
11
PK7702
ROTARY SW
LP
+5V
QR3002
VR3012
SP Q
QR3001QR3003
LP
LP Q
VR3013
ADJ
PB Q
12
37
38
TRANSCEIVER
IIC BUS
VV
EE
to the VCR can be appeared on the PAL TV.However when recording,
the signals from NTSC Signal Source (ex.NTSC GAME Machine)connected
FAMI MODE:When setting the NTSC CONVERTER to ON on the OSD Screen Display,
it is not recorded correctly.
HEAD AMP C.B.A.
SP COM
SP L
P502
2
P502
4 @
P502
SP R
H.SW
&
PREAMP
LP COM
SW
H.AMP
SW
H.AMP
&
AMP
H.SW
&
PREAMP
P3001
15
C
Y
AGC
RF
DET
AGC
&HPF
L-TRAP
EE
27
24
23
LOCK
SIDE
AFC
EE
VV
VV SP
FAMI/
VV LP
EE
EE
VV
DET
ACC
VV
ALTERNATION
NTSC
FAMI
ADJ
REC-C
(FAMI)2.2M*4.43M
(PB)2.2/1.79M*4.43/3.58M
BM-B
CACC
BPF
630KHz
VVEE
+
+
0HDL
1HDL
2HDL
0HDL
(FAMI)3.58M*2.2M
(PB)630K*2.2/1.79M
(REC)4.43/3.58M
BM-A
ACC
LPF
EE
UP/DOWN
BURST
FAMI
VV/
FAMI/VV
EE
FAMI
EE
4.43M
3.58M/
BPF
VV
1.79M
(NTSC-PB)
(PAL-PB)2.2M
(FAMI)3.58M
BPF
VV
FAMI
PEAKING
20
DET
ENV
LIM
DOUB
LPF
SUB
DEM
FM
C
CLP1
EE
NC2
PICT
NC1
FAMI
VV
NOR
DDC
YNR
HSS
LPF
DELAY
1H
DET
V2
T
V1
C
AGC
Y/C
SYNC
ART
1/40
1/2
CONTROL
SYSTEM
TO/FROM
CLAMP
SUB
MIX
Y/C
56
X3001
31
Y
FH
30
ROTATION
PHASE
CK DET
APC
F.DET
19
+
1/4
BM
SUB
H-TRAP
ADJ
DEV
EMPH
MAIN
CLIP
W/D
VV
MOD
FM
Y
LP L
P502
7 @
P502
5 @
P502
MIX
Y/C
6
4
9
7
3
10
34
27
HEAD SW
25
2
31
LPF
1
LP R
3 @
6 @
P501
6
30
RF Y+C
7
ADJ
REC-Y
IC501
REC Y+C
C
H.AMP SW @
P501
P501
ENV.SEL
P501
P501
P501
P3001
P3001 D.REC
P3001
P3001
P3001
TRACK ENV.
P3001
7
P501
6
FAMI
EE/
IC3001
VV
NLDE
NLE
DTE
LPF
MAIN
VCO
25
50
67
VV/FAMI
EE
46
FAMI
48
KILLER SW
COLOUR
52
54
43
VV
42
EE
Y/C
Y
2fsc
1/4
VXO
X2
fsc

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