4 Rabbit 2000/3000 Microprocessor
EXX ....................................47
H. Stack Manipulation
ADD SP,d ...............................22
POP IP .................................103
POP IX .................................103
POP IY .................................103
POP zz ................................105
PUSH IP ...............................106
PUSH IX ...............................106
PUSH IY ...............................106
PUSH zz ...............................108
I. 16-bit Arithmetic, Logical, and Rotate
ADC HL,ss ..............................16
ADD HL,ss ..............................20
ADD IX,xx ...............................21
ADD IY,yy ...............................21
ADD SP,d ...............................22
AND HL,DE ..............................25
BOOL HL ................................30
BOOL IX ................................31
BOOL IY ................................31
DEC IX ..................................39
DEC IY ..................................39
DEC ss .................................41
INC IX ..................................50
INC IY ..................................50
INC ss ..................................52
MUL ....................................96
NEG ....................................97
OR HL,DE ..............................100
OR IX,DE ..............................101
OR IY,DE ..............................101
RL DE .................................116
RR DE .................................123
RR HL .................................123
RR IX ..................................124
RR IY ..................................124
SBC HL,ss .............................133
I.16-bit Arithmetic, Logical, and Rotate
AND HL,DE ..............................25
AND IX,DE ..............................25
AND IY,DE ..............................25
J. 8-bit Arithmetic and Logical
ADC A,(HL) ........................13
ADC A,(IX+d) .......................13
ADC A,(IY+d) .......................13
ADC A,n ................................ 14
ADC A,r ................................ 15
ADD A,(HL) ............................. 17
ADD A,(IX+d) ........................... 17
ADD A,(IY+d) ........................... 17
ADD A,n ................................ 18
ADD A,r ................................ 19
AND (HL) ............................... 24
AND (IX+d) ............................. 24
AND (IY+d) ............................. 24
AND r .................................. 27
CP (HL) ................................ 34
CP (IX+d) ............................... 34
CP (IY+d) ............................... 34
CP n ................................... 35
CP r .................................... 36
NEG ................................... 97
OR (HL) ................................ 99
OR (IX+d) ............................... 99
OR (IY+d) ............................... 99
OR n .................................. 102
OR r .................................. 102
SBC (IX+d) ............................ 131
SBC (IY+d) ............................ 131
SBC A,(HL) ............................ 131
SBC A,n ............................... 132
SBC A,r ............................... 132
SUB (HL) .............................. 144
SUB (IX+d) ............................ 144
SUB (IY+d) ............................ 144
SUB n ................................. 145
SUB r ................................. 146
XOR (HL) .............................. 150
XOR (IX+d) ............................ 150
XOR (IY+d) ............................ 150
XOR n ................................. 151
XOR r ................................. 152
K. 8-bit Bit Set, Reset, and Test
BIT b,(HL) .............................. 28
BIT b,(IX+d) ............................. 28
BIT b,(IY+d) ............................. 28
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