Addressing
2-7
ET 200S Interface Module IM 151/CPU
A5E00058783-01
2.4 Accessing the Intermediate Memory in the IM 151/CPU
Access in the User Program
The following table tells you how to access the intermediate memory in the
ET 200S from the user program:
Table 2-3 Accessing the Address Areas
Access Dependent on Data
Consistency
The Following Applies
1-, 2- or 4-byte data consistency
with load/transfer instructions
All areas parameterized with “unity” consistency can be accessed.
You can address a maximum of 64 bytes of input data using load
instructions and a maximum of 64 bytes of output data using transfer
instructions (L PIB/PIW/PID; T PQB/PQW/PQD; see also Appendix
B).
The data consistency for word addressing is 2 bytes; for double-word
addressing it is 4 bytes.
Access is also possible via the process image.
1- to 32-byte data consistency on
the PROFIBUS-DP with SFC 14
and SFC 15
If you want to access data in the intermediate memory, you have to
read the input data with SFC 14 ”DPRD_DAT” and write the output
data with SFC 15 ”DPWR_DAT”. These SFCs have data consistency
of 1 to 32 bytes.
You can only copy the input data read with SFC 14 as a block of 1 to
32 bytes to a memory marker address area, for example, where it
can be addressed with A M x.y. You can also write only one block of
1 to 32 bytes as output data with SFC 15 (see also the
System and
Standard Functions
) Reference Manual.
If you access areas with “whole length” consistency, the length in the
SFC must correspond to the length of the parameterized area.
Access to Free Areas in the Process Image
If you access available but unconfigured process image areas, no process image
errors will be generated. You can therefore use inputs and outputs in the process
image to which no I/O modules are allocated as markers.
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