Technical Specifications
6-5
ET 200S Interface Module IM 151/CPU
A5E00058783-01
Technical Specifications
CPU and Product Version
MLFB 6ES7 151-7AA00-0AB0
FO:
6ES7 151-7AB00-0AB0
Hardware version 1
Firmware version V1.0.0
Matching
programming
package
STEP 7 V5.1 or higher
Memory
Working memory
integral 24 KB
Expandable No
Load memory:
integral 40 KB RAM
Expandable 64 KB MMC
2 MB MMC
Backup No
Processing times
Processing times for
Bit instructions 0.3 µs minimum
Word instructions 1 µs minimum
Fixed-point math
instructions
2 µs minimum
Floating-point math
instructions
50 µs minimum
Timers, Counters and their Retentive Features
S7 counters 64
Adjustable retentivity from C 0 to C 63
Preset from C 0 to C 7
Counting range 0 to 999
IEC Counters Yes
Type SFB
S7 timers 128
Adjustable retentivity from T 0 to T 127
Preset No retentive times
Timing range 10 ms to 9990 s
IEC Timers Yes
Type SFB
Data areas and their retentive characteristics
Total retentive data area
(incl. memory markers,
timers, counters)
Max. 4736 bytes
Bit memories 256 bytes
Adjustable retentivity MB 0 to MB 255
Preset retentivity MB 0 to MB 15
Clock memory 8 (1 memory byte)
Data blocks max. 127 (DB 0
reserved)
Size max. 8 KB
Adjustable retentivity max. 8 DB, 4096 data
bytes in all
Preset retentivity No retentivity
Local data max. 1536 bytes
Per priority class Max. 256 bytes
Blocks
OBs See Appendix B
Size max. 8 KB
Nesting depth:
Per priority class 8
additional levels
within an error OB
4
FBs max. 128
Size max. 8 KB
FCs max. 128
Size max. 8 KB
Address areas (inputs/outputs)
Total I/O address area Max.
1536 bytes/1536 bytes
Distributed 64 bytes/64 bytes
Process image 128 bytes/128 bytes
(not adjustable)
Digital channels Max. 248/248
Analog channels Max. 124/124
Time
Clock Software clock
Operating hours counter No