HBD-E280/T28
74
MB-141 BOARD IC6201 R5F3650KBDFA (SYSTEM CONTROLLER)
Pin No. Pin Name I/O Description
1 BD_SDI O Serial data output to the BD decoder
2 BD_SCLK I Serial data transfer clock signal input from the BD decoder
3 NO USE I Not used
4 SIRCS_IN I SIRCS signal input from the remote control receiver
5 FL_DOUT O Serial data output to the fl uorescent indicator tube driver
6 S-AIR_GPIO2 I Interrupt signal input terminal Not used
7 FL_CLK O Serial data transfer clock signal output to the fl uorescent indicator tube driver
8 BYTE I External data bus width selection signal input terminal
9 CNVss I Processor mode selection signal input terminal
10 ADC_PDN O Power down signal output terminal Not used
11 NO USE O Not used
12 RESET I
System reset signal input from the reset signal generator and reset switch “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
13 Xout O System clock output terminal (8 MHz)
14 Vss - Ground terminal
15 Xin I System clock input terminal (8 MHz)
16 Vcc - Power supply terminal (+3.3V)
17 CEC (TX/RX) I/O CEC serial data input/output with the HDMI connector
18 TS_INT I Touch sensor detection signal input terminal Not used
19 KEY_INT I Key wake-up signal input terminal
20 AC_CUT I AC cut detection signal input terminal “L”: AC cut
21 BD_IF_START O Ready signal output to the BD decoder “H”: ready
22 LED_PWM3 O LED drive signal output terminal Not used
23 TS_RST O Touch sensor reset signal output terminal Not used
24 PCONT_TS O Power supply on/off control signal output terminal Not used
25 BD_IF_REQ I Request signal input from the BD decoder
26 LED_PWM2 O LED drive signal output terminal Not used
27 PCONT_FL O
Power supply on/off control signal output terminal for fl uorescent indicator tube driver
“H”: power on
28 LED_PWM1 O LED drive signal output terminal Not used
29 S-AIR_SCL I/O Two-way I2C clock bus terminal Not used
30 S-AIR_SDA I/O Two-way I2C data bus terminal Not used
31 TXD1 O Not used
32 RXD1 I Not used
33 CLK1 O Not used
34 RTS1 O Not used
35 DAMP_SCDT O Serial data output to the stream processor
36 DC_DET I Speaker DC detection signal input terminal “L”: speaker DC is detected
37 DAMP_SHIFT O Serial data transfer clock signal output to the stream processor
38 PCONT_CORE O Power supply on/off control signal output terminal “H”: power on
39 PCONT2 O Power supply control signal output terminal Not used
40 PCONT3 O Power supply on/off control signal output terminal “H”: power on
41 PCONT4 O Power supply control signal output terminal Not used
42 HDMI_PCONT O Power supply control signal output terminal Not used
43 ATA_PCONT1 O Power supply on/off control signal output terminal “H”: power on
44 FAN_ON O Power supply on/off control signal output terminal for fan motor “H”: power on
45 FAN_CONT O Fan motor on/off control signal output terminal “H”: motor on
46 CE I Chip enable signal input terminal Not used
47 ST_SDA I/O Two-way data bus with the FM receiver
48 ST_SCL O Serial data transfer clock signal output to the FM receiver
49 NO USE O Not used
50 DRIVER_RST (EN) O Reset signal output to the power amplifi er “L”: reset
51, 52
OVERFLOW1,
OVERFLOW2
I Overfl ow detection signal input from the stream processor
53 DAMP_INIT O Reset signal output to the stream processor “L”: reset
54 DAMP_SOFT_MUTE O Soft muting on/off control signal output to stream processor “L”: muting on
55 DAMP_LATCH1 O Serial data latch pulse signal output to the stream processor
56 DAMP_LATCH2 O Serial data latch pulse signal output to the stream processor
57 DAMP_LATCH3 O Serial data latch pulse signal output to the stream processor
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