Sony HBD-E4100 - Block Diagram - MEMORY;HDMI Section

HBD-E2100/E3100/E4100/E6100
HBD-E2100/E3100/E3200/E4100/E6100
3838
6-2. BLOCK DIAGRAM - MEMORY/HDMI Section -
SD-RAM
IC102
RWE_
RA0 - RA13
RDQ0 - RDQ15
RCS_
P130
P128
L3
L2
/WE
RBA0
P140
M2
BA0
RBA1
P118
N8
BA1
RBA2
P139
M3
BA2
/CS
RCAS_
RRAS_
P127
P126
K3
J3
/CAS
/RAS
RCKE
P116
K9
CKE
RCLK0
P98
J7
CK
RCLK0_
P97
K7
/CK
RDQM1
RDQS1
P91
P100
D3
C7
DMU
DQSU
RDQS1_
RDQM0
P101
P99
B7
E7
/DQSU
DML
RODT
P141
K1
ODT
RDQS0
P94
F3
DQSL
RDQS0_
P95
G3
/DQSL
T2
/RESET
A0 - A13
DQL0 - DQL7,
DQU0 - DQU7
SD-RAM
IC103
A0 - A13
DQL0 - DQL7,
DQU0 - DQU7
NAND FLASH
IC1001
BD DECODER
IC101 (2/3)
NFD0 - NFD7
D0A0 - D0A13
D0A0 - D0A13
NFWEN
P79 18
WE
NFREN
P75 8
RE
NFCEN
NFRBN
P76
P74
9
7
CE
RY/BY
NFALE
NFCLE
P78
P77
17
16
ALE
CLE
19
WP
IO1 - IO8
NAND_RESET
RRESET
P134
L3
L2
/WE
/WE
M2
BA0
N8
BA1
M3
BA2
/CS
K3
J3
/CAS
/RAS
K9
CKE
J7
CK
K7
/CK
D3
C7
DMU
DQSU
B7
E7
/DQSU
DML
K1
ODT
F3
DQSL
G3
/DQSL
T2
/RESET
RDQ16 - RDQ31
MAIN
SECTION
(Page 39)
C
MAIN
SECTION
(Page 39)
A
MAIN
SECTION
(Page 39)
B
CH0_P
P221
SPDIF_IN1
P64
CH0_M
P220
7
9
CH1_P
P223
CH1_M
P222
4
6
CH2_P
P225
CH2_M
P224
1
3
CLK_P
P219
CLK_M
P218
10
HTPLG
TMDS DATA0 +
TMDS DATA0 –
TMDS DATA1 +
TMDS DATA1 –
TMDS DATA2 +
TMDS DATA2 –
TMDS CLOCK +
TMDS CLOCK –
SDA
SCL
HPD
CEC
P197 19
12
16
+5V POWER
18
15
13
RESERVED (ARC)
14
HDMISD
P199
HDMISCK
P200
CEC DRIVER
Q401
CN401
HDMI
OUT ARC
CEC
PCONT3
+5V REG
IC408
UNSW +5.5V
WAVE
SHAPER
IC403
6LJQDOSDWK
: VIDEO
: AUDIO
4
1
5
BA2
BA1
BA0
ODT
/RAS
/CAS
/CS
DMU
/CK
CK
CKE
DQSL
DML
/RESET
/DQSL
/DQSU
DQSU
/WE
BA2 BA1 BA0
ODT
/RAS /CAS
/CS
DMU
/CK
CK
CKE
DQSL
DML
/RESET
/DQSL
/DQSU
DQSU
X301
27MHz
NS_XTALI
P229
NS_XTALO
P230
Ver. 1.5