Sony STR-DE915 - IC Block Diagrams

2-15. IC BLOCK DIAGRAMS
1 2 3 4 5 6 7
8
9
NC
OUTPUT 2
Vcc
GND
NC
INPUT 2
INPUT 1
NC
MOTOR
DRIVE
MOTOR
DRIVE
REG
SWITCH
SWITCH
OUTPUT1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
CONTROL
LATCH
SHIFT RESISTOR
LEVEL SHIFT
CL
DI
CE
VEE
OUT
IN
OUT
IN
OUT
IN
VSS
S
RESET
VDD
OUT
IN
IN
OUT
IN
OUT
IN
1
2
3
4
5
6
7
8
V+
VSB/SESIN
VSA
RESET
GND
OUTC
VSC
CR
VREF
+
–
–
+
–
+
–
+
Q
R S
+
–
+
–
–
2
3
5
4
6
7
9 8
1
INHIBIT
GND
REG OUT
NC
OUT1
IN2 IN3 IN4
VCC1 VCC2 REG-SW IN1 INHIBIT1 OUT2 INHIBIT2
REGULATOR
INHIBIT
11 10
12
13
14
1
2
3
4
5
6
7
8
9
15
10
11
12
13
14
16
DECODER
DECODER
MONITOR OUT
GND
IN5
GND
IN4
CTL E
IN3
CTL D
6dB
6dB
IN1
CTL A
V OUT1
VCC
IN2
CTL B
V OUT2
CTL C
1
2
3
4
5
6
7
8
9
TR3 R1
R2
TR4
TR6
TR7
R4
R9
TR5
TR1
TR2
R6
D4 D3
R7
R8
TR8
D1 D2
R5
R3
INPUT
NF
-VEOUT
+VEOUT
V
SS
GND
V
CC
SUB
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D3D2
D1
D0
Y
W
SC
D4
D5
D6
D7
A
B
D3
D2
D1
D0
Y
XY
OE
GND
V CC
D4
D5
D6
D7
A
B
C
QD
ST
ST
Q
D
CK
D
Q
Q
D
CK
24
25
23
22
21
26
27
28
36
40
39
38
37
35
34
33
32
31
1
20
29
60
41
30
OUT1
OUT20
H V
CC
P GND
L GND
CL
NC
STB
NC
NC
S IN
V
DD
OUT40
OUT21
H V
CC
P GND
L GND
NC
CHG
NC
CK
NC
S OUT
VDD
IC106 BA6208
IC301, 303 LC7822
IC223 NJM2129D
IC901 NJM2103D
IC203, 204, 211 SN761200
IC601 STK350-230
IC3313 TC74HC151AF-TP1
IC107 TD62C950RF
— 57 — — 58 — — 59 — — 60 —
IC3401, 3402, 3403 CXD8505BQ
IC3409 TC5081AP
IC108 MSC1164GS-K
32 31 30 29 28 27 26 25 24 23 22 21 20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
34
33
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52 53 54 55 56 57 58 59 60 61 62 63 64
PLM
PLM
CLOCK
GENERATOR
TIMING
CIRCUIT
S/P
MODE
"O" DETECT
MUTE
CIRCUIT
ATT
FIR1
FIR2
FIR3
L. I. P.
(x 8)
IIR
ATT FIR1
IIR
3RD ORDER
NOISE
SHAPER
FIR2
FIR3
L. I. P.
(x 8)
3RD ORDER
NOISE
SHAPER
AC, DC
DITHER
SYSM
ATT
SHIFT
LATCH
XINT
XDCK
XLRCK
DATA1
VSUD(D)R
DF VSS
VSUB(D)L
INAF
512FS0
256FS0
128FS0
I NV1
I NV01
I NV02
MUTE R
VSS2
R2(+)
VSS
R2(
-
)
VDD
VDD2
VSUB(A)R
XVSS
XVSS
X IN
X OUT
XVDD
VSUB(A)L
VDD2
VDD
L2(-)
L2(+)
VSS
VSS2
XSEL SPLM DFVDD1 DVDDR VSUB(D)R VSUB(C)R VDD2 VDD R1(-) VSS R1(+) VSS2 201x16
MUTE L
TEST 1 TEST 2
DFVDD2
DV DDL
VSUB(D)L
VSUB(C)L
VDD2
VDD
L1(-)
L1(+)
VSS
VSS2
20 BIT
SHIFT
REGISTER
20 BIT
LATCH
GATE
CIRCUIT
OUTPUT
CIRCUIT
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
16151413121110987654321
NC NC
DOUT
LS CL
V
CC
HVO20 HVO19 HVO18 HVO17 HVO16 HVO15 HVO14 HVO13 HVO12 HVO11
HVO1 Vhv GND CLK DIN CHG NC
D
CK
CK
Q
HVO2 HVO3 HVO4 HVO5 HVO6 HVO7 HVO8 HVO9 HVO1
0
2
3
5
4
6
7
98
1
MUTE
+ VOUT1 – VOUT1
COMP1
MF1
IN1
GND
IN2
NF2
COMP2
– VOUT2 + VOUT2
VCC1 VCC2
VEE
PROTECTOR
BIAS CIRCUIT
REG DRIVE
PRE
DRIVE
11
10
12
13
1514
DRIVE
PRE
DRIVE
VREF-
2
VCOML
3
AINL+
4
VOLTAGE
REFERENCE
DELTA-SIGMA
MODULATOR
DECIMATOR
CONTROLLER
VOLTAGE
REFERENCE
DECIMATION
FILTER
CALIBRATION
SRAM
SERIAL OUTPUT
INTERFACE
DELTA-SIGMA
MODULATOR
VREF+
1
AINL-
5
ZCAL
6
VD
7
DGND
8
CAL
9
RST
10
SMODE 2
11
SMODE 1
12
LRCK
13
SCLK
14
VREF-
27
VCOMR
26
AINR+
25
VREF+
AINR-
24
VA
23
AGND
22
BGND
21
TEST
20
SEL24
19
CMODE
18
MCLK
17
FSYNC
16
SDATA
15
28
IC501, 701 uPC2581V
IC3104 CXD8681M-TP
1 2 3 4 5 6 7 8 9
PHASE
COMPARATOR
AOUT
AIN
PDOUT
PHASE OUT
VDD
N. C.
S
R
GND