Sony Trinitron KV-27FV310 - Page 36

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KV-27FV310/29FV310/32FV310/36FV310
A BOARD TRANSISTOR VOLTAGE LIST
BCE BCE
Q001 0.0 0.4 5.0 Q400 0.0 0.0 GND
Q002 4.4 9.0 3.8 Q401 0.0 0.0 GND
Q003 0.7 0.0 GND Q402 0.0 0.0 GND
Q004 0.0 4.3 GND Q403 0.0 0.0 GND
Q005 0.1 4.9 GND Q407 0.7 0.0 GND
Q010 4.3 GND 4.9 Q500 3.5 9.0 2.9
Q110 4.8 0.0 5.0 Q501 0.0 123.6 GND
Q300 4.6 GND 5.2 Q502 0.0 131.8 0.0
Q304 5.0 9.0 4.4 Q511 -13.5 -8.4 -15.0
Q305 5.0 0.0 3.4 Q512 -14.9 -2.0 -15.0
Q307 1.5 GND 2.2 Q530 0.0 4.4 GND
Q308 1.5 GND 2.2 Q531 4.4 0.0 4.4
Q309 1.5 GND 2.2 Q532 133.6 0.0 133.8
Q314 0.0 3.4 GND Q561 0.0 4.4 GND
Q315 3.4 GND 4.1 Q562 0.0 0.0 GND
Q316 6.4 2.7 7.1 Q580 5.0 GND
0
Q317 0.0 3.9 GND Q581 0.0 GND 0
Q319 0.6 0.6 GND Q590 0.0 3.6 GND
Q325 2.6 6.4 1.9 Q6000 0.6 1.2 GND
Q326 2.7 GND 3.4
All voltages are in V.
Port P0 Port P2 Port P3 Port P4 Port P5 Port P6
P
o
r
t
P
7
P
o
r
t
P
8
I/O PORTS
P
o
r
t
P
9
P
o
r
t
P
1
0
Internal peripheral functions
Timer
Timer TA0 (16bits)
Timer TA1 (16bits)
Timer TA2 (16bits)
Timer TA3 (16bits)
Timer TA4 (16bits)
Timer TB0 (16bits)
Timer TB1 (16bits)
Timer TB2 (16bits)
Watchdog timer
(15bits)
DMAC
(2 channels)
D-A converter
(8 bits X 2 channels)
A-D converter
OSD
Data slicer
SYNC counter
H
M16C/60 series 16-bit CPU core
System clock generator
XIN-XOUT
UART/clock synchronous SI/O
UART/clock asynchronous SI/O
Multi-master PC-bus
Multi-master PC-bus
Interface 0
Interface 1
Memory
ROM
192 K
RAM
5K
Multiplier
Program counter
Registers
PC
INTB
Vector table
Black pointer
FLG
USP
ISP
R0H R0L
R1H R1L
SB
FB
A1
A0
R3
R2
888443
5
1
3
2
IC001 BLOCK DIAGRAM